diff options
author | Jason Ekstrand <[email protected]> | 2019-05-06 10:23:26 -0500 |
---|---|---|
committer | Jason Ekstrand <[email protected]> | 2019-05-24 08:38:11 -0500 |
commit | ddd08e1888cfdf7a643b8fa1ce61f77bb66aa3eb (patch) | |
tree | d7a679f59482db5f44756bbb482f55e61861d057 /src | |
parent | 6c2ca2a5d33cdfc4202ebb0df54567b587ecc578 (diff) |
nir/builder: Remove the use_fmov parameter from nir_swizzle
This flag has caused more confusion than good in most cases. You can
validly use imov for floats or fmov for integers because, without source
modifiers, neither modify their input in any way. Using imov for floats
is more reliable so we go that direction.
Reviewed-by: Kristian H. Kristensen <[email protected]>
Acked-by: Alyssa Rosenzweig <[email protected]>
Diffstat (limited to 'src')
-rw-r--r-- | src/amd/vulkan/radv_meta_blit.c | 6 | ||||
-rw-r--r-- | src/amd/vulkan/radv_meta_buffer.c | 2 | ||||
-rw-r--r-- | src/compiler/glsl/glsl_to_nir.cpp | 6 | ||||
-rw-r--r-- | src/compiler/nir/nir_builder.h | 9 | ||||
-rw-r--r-- | src/compiler/nir/nir_builtin_builder.c | 8 | ||||
-rw-r--r-- | src/compiler/nir/nir_lower_tex.c | 16 | ||||
-rw-r--r-- | src/compiler/nir/nir_lower_vars_to_ssa.c | 2 | ||||
-rw-r--r-- | src/compiler/nir/nir_split_vars.c | 2 | ||||
-rw-r--r-- | src/compiler/spirv/spirv_to_nir.c | 4 | ||||
-rw-r--r-- | src/compiler/spirv/vtn_glsl450.c | 18 | ||||
-rw-r--r-- | src/gallium/auxiliary/nir/tgsi_to_nir.c | 10 | ||||
-rw-r--r-- | src/intel/compiler/brw_nir_attribute_workarounds.c | 2 | ||||
-rw-r--r-- | src/intel/compiler/brw_nir_lower_mem_access_bit_sizes.c | 2 | ||||
-rw-r--r-- | src/mesa/program/prog_to_nir.c | 10 | ||||
-rw-r--r-- | src/mesa/state_tracker/st_nir_lower_builtin.c | 2 |
15 files changed, 48 insertions, 51 deletions
diff --git a/src/amd/vulkan/radv_meta_blit.c b/src/amd/vulkan/radv_meta_blit.c index 5af9c4a303f..eb131e68fd1 100644 --- a/src/amd/vulkan/radv_meta_blit.c +++ b/src/amd/vulkan/radv_meta_blit.c @@ -128,7 +128,7 @@ build_nir_copy_fragment_shader(enum glsl_sampler_dim tex_dim) unsigned swz[] = { 0, (tex_dim == GLSL_SAMPLER_DIM_1D ? 2 : 1), 2 }; nir_ssa_def *const tex_pos = nir_swizzle(&b, nir_load_var(&b, tex_pos_in), swz, - (tex_dim == GLSL_SAMPLER_DIM_1D ? 2 : 3), false); + (tex_dim == GLSL_SAMPLER_DIM_1D ? 2 : 3)); const struct glsl_type *sampler_type = glsl_sampler_type(tex_dim, false, tex_dim != GLSL_SAMPLER_DIM_3D, @@ -186,7 +186,7 @@ build_nir_copy_fragment_shader_depth(enum glsl_sampler_dim tex_dim) unsigned swz[] = { 0, (tex_dim == GLSL_SAMPLER_DIM_1D ? 2 : 1), 2 }; nir_ssa_def *const tex_pos = nir_swizzle(&b, nir_load_var(&b, tex_pos_in), swz, - (tex_dim == GLSL_SAMPLER_DIM_1D ? 2 : 3), false); + (tex_dim == GLSL_SAMPLER_DIM_1D ? 2 : 3)); const struct glsl_type *sampler_type = glsl_sampler_type(tex_dim, false, tex_dim != GLSL_SAMPLER_DIM_3D, @@ -244,7 +244,7 @@ build_nir_copy_fragment_shader_stencil(enum glsl_sampler_dim tex_dim) unsigned swz[] = { 0, (tex_dim == GLSL_SAMPLER_DIM_1D ? 2 : 1), 2 }; nir_ssa_def *const tex_pos = nir_swizzle(&b, nir_load_var(&b, tex_pos_in), swz, - (tex_dim == GLSL_SAMPLER_DIM_1D ? 2 : 3), false); + (tex_dim == GLSL_SAMPLER_DIM_1D ? 2 : 3)); const struct glsl_type *sampler_type = glsl_sampler_type(tex_dim, false, tex_dim != GLSL_SAMPLER_DIM_3D, diff --git a/src/amd/vulkan/radv_meta_buffer.c b/src/amd/vulkan/radv_meta_buffer.c index 3e4f63ad3c1..c19bf0da1c3 100644 --- a/src/amd/vulkan/radv_meta_buffer.c +++ b/src/amd/vulkan/radv_meta_buffer.c @@ -44,7 +44,7 @@ build_buffer_fill_shader(struct radv_device *dev) nir_ssa_dest_init(&load->instr, &load->dest, 1, 32, "fill_value"); nir_builder_instr_insert(&b, &load->instr); - nir_ssa_def *swizzled_load = nir_swizzle(&b, &load->dest.ssa, (unsigned[]) { 0, 0, 0, 0}, 4, false); + nir_ssa_def *swizzled_load = nir_swizzle(&b, &load->dest.ssa, (unsigned[]) { 0, 0, 0, 0}, 4); nir_intrinsic_instr *store = nir_intrinsic_instr_create(b.shader, nir_intrinsic_store_ssbo); store->src[0] = nir_src_for_ssa(swizzled_load); diff --git a/src/compiler/glsl/glsl_to_nir.cpp b/src/compiler/glsl/glsl_to_nir.cpp index d21ad90505e..9152b02967c 100644 --- a/src/compiler/glsl/glsl_to_nir.cpp +++ b/src/compiler/glsl/glsl_to_nir.cpp @@ -1634,7 +1634,7 @@ nir_visitor::visit(ir_assignment *ir) for (unsigned i = 0; i < 4; i++) { swiz[i] = ir->write_mask & (1 << i) ? component++ : 0; } - src = nir_swizzle(&b, src, swiz, num_components, false); + src = nir_swizzle(&b, src, swiz, num_components); } if (ir->condition) { @@ -1816,7 +1816,7 @@ nir_visitor::visit(ir_expression *ir) }; result = nir_swizzle(&b, result, swiz, - swizzle->type->vector_elements, false); + swizzle->type->vector_elements); } return; @@ -2276,7 +2276,7 @@ nir_visitor::visit(ir_swizzle *ir) { unsigned swizzle[4] = { ir->mask.x, ir->mask.y, ir->mask.z, ir->mask.w }; result = nir_swizzle(&b, evaluate_rvalue(ir->val), swizzle, - ir->type->vector_elements, false); + ir->type->vector_elements); } void diff --git a/src/compiler/nir/nir_builder.h b/src/compiler/nir/nir_builder.h index ced009a66c7..68cf886fa1c 100644 --- a/src/compiler/nir/nir_builder.h +++ b/src/compiler/nir/nir_builder.h @@ -528,7 +528,7 @@ nir_imov_alu(nir_builder *build, nir_alu_src src, unsigned num_components) */ static inline nir_ssa_def * nir_swizzle(nir_builder *build, nir_ssa_def *src, const unsigned *swiz, - unsigned num_components, bool use_fmov) + unsigned num_components) { assert(num_components <= NIR_MAX_VEC_COMPONENTS); nir_alu_src alu_src = { NIR_SRC_INIT }; @@ -544,8 +544,7 @@ nir_swizzle(nir_builder *build, nir_ssa_def *src, const unsigned *swiz, if (num_components == src->num_components && is_identity_swizzle) return src; - return use_fmov ? nir_fmov_alu(build, alu_src, num_components) : - nir_imov_alu(build, alu_src, num_components); + return nir_imov_alu(build, alu_src, num_components); } /* Selects the right fdot given the number of components in each source. */ @@ -587,7 +586,7 @@ nir_bany(nir_builder *b, nir_ssa_def *src) static inline nir_ssa_def * nir_channel(nir_builder *b, nir_ssa_def *def, unsigned c) { - return nir_swizzle(b, def, &c, 1, false); + return nir_swizzle(b, def, &c, 1); } static inline nir_ssa_def * @@ -601,7 +600,7 @@ nir_channels(nir_builder *b, nir_ssa_def *def, nir_component_mask_t mask) swizzle[num_channels++] = i; } - return nir_swizzle(b, def, swizzle, num_channels, false); + return nir_swizzle(b, def, swizzle, num_channels); } static inline nir_ssa_def * diff --git a/src/compiler/nir/nir_builtin_builder.c b/src/compiler/nir/nir_builtin_builder.c index a050306765e..8812c7a6a8a 100644 --- a/src/compiler/nir/nir_builtin_builder.c +++ b/src/compiler/nir/nir_builtin_builder.c @@ -32,10 +32,10 @@ nir_cross3(nir_builder *b, nir_ssa_def *x, nir_ssa_def *y) unsigned yzx[3] = { 1, 2, 0 }; unsigned zxy[3] = { 2, 0, 1 }; - return nir_fsub(b, nir_fmul(b, nir_swizzle(b, x, yzx, 3, true), - nir_swizzle(b, y, zxy, 3, true)), - nir_fmul(b, nir_swizzle(b, x, zxy, 3, true), - nir_swizzle(b, y, yzx, 3, true))); + return nir_fsub(b, nir_fmul(b, nir_swizzle(b, x, yzx, 3), + nir_swizzle(b, y, zxy, 3)), + nir_fmul(b, nir_swizzle(b, x, zxy, 3), + nir_swizzle(b, y, yzx, 3))); } nir_ssa_def* diff --git a/src/compiler/nir/nir_lower_tex.c b/src/compiler/nir/nir_lower_tex.c index 0e1aa26a904..53719017a87 100644 --- a/src/compiler/nir/nir_lower_tex.c +++ b/src/compiler/nir/nir_lower_tex.c @@ -589,20 +589,20 @@ lower_gradient_cube_map(nir_builder *b, nir_tex_instr *tex) Q = nir_bcsel(b, cond_z, p, nir_bcsel(b, cond_y, - nir_swizzle(b, p, xzy, 3, false), - nir_swizzle(b, p, yzx, 3, false))); + nir_swizzle(b, p, xzy, 3), + nir_swizzle(b, p, yzx, 3))); dQdx = nir_bcsel(b, cond_z, dPdx, nir_bcsel(b, cond_y, - nir_swizzle(b, dPdx, xzy, 3, false), - nir_swizzle(b, dPdx, yzx, 3, false))); + nir_swizzle(b, dPdx, xzy, 3), + nir_swizzle(b, dPdx, yzx, 3))); dQdy = nir_bcsel(b, cond_z, dPdy, nir_bcsel(b, cond_y, - nir_swizzle(b, dPdy, xzy, 3, false), - nir_swizzle(b, dPdy, yzx, 3, false))); + nir_swizzle(b, dPdy, xzy, 3), + nir_swizzle(b, dPdy, yzx, 3))); /* 2. quotient rule */ @@ -780,7 +780,7 @@ swizzle_tg4_broadcom(nir_builder *b, nir_tex_instr *tex) assert(nir_tex_instr_dest_size(tex) == 4); unsigned swiz[4] = { 2, 3, 1, 0 }; - nir_ssa_def *swizzled = nir_swizzle(b, &tex->dest.ssa, swiz, 4, false); + nir_ssa_def *swizzled = nir_swizzle(b, &tex->dest.ssa, swiz, 4); nir_ssa_def_rewrite_uses_after(&tex->dest.ssa, nir_src_for_ssa(swizzled), swizzled->parent_instr); @@ -808,7 +808,7 @@ swizzle_result(nir_builder *b, nir_tex_instr *tex, const uint8_t swizzle[4]) swizzle[2] < 4 && swizzle[3] < 4) { unsigned swiz[4] = { swizzle[0], swizzle[1], swizzle[2], swizzle[3] }; /* We have no 0s or 1s, just emit a swizzling MOV */ - swizzled = nir_swizzle(b, &tex->dest.ssa, swiz, 4, false); + swizzled = nir_swizzle(b, &tex->dest.ssa, swiz, 4); } else { nir_ssa_def *srcs[4]; for (unsigned i = 0; i < 4; i++) { diff --git a/src/compiler/nir/nir_lower_vars_to_ssa.c b/src/compiler/nir/nir_lower_vars_to_ssa.c index a5f4ca53cf9..8239eb069c5 100644 --- a/src/compiler/nir/nir_lower_vars_to_ssa.c +++ b/src/compiler/nir/nir_lower_vars_to_ssa.c @@ -589,7 +589,7 @@ rename_variables(struct lower_variables_state *state) swiz[i] = i < intrin->num_components ? i : 0; new_def = nir_swizzle(&b, value, swiz, - intrin->num_components, false); + intrin->num_components); } else { nir_ssa_def *old_def = nir_phi_builder_value_get_block_def(node->pb_value, block); diff --git a/src/compiler/nir/nir_split_vars.c b/src/compiler/nir/nir_split_vars.c index 5e799d2dc57..62f322236e3 100644 --- a/src/compiler/nir/nir_split_vars.c +++ b/src/compiler/nir/nir_split_vars.c @@ -1464,7 +1464,7 @@ shrink_vec_var_access_impl(nir_function_impl *impl, b.cursor = nir_before_instr(&intrin->instr); nir_ssa_def *swizzled = - nir_swizzle(&b, intrin->src[1].ssa, swizzle, c, false); + nir_swizzle(&b, intrin->src[1].ssa, swizzle, c); /* Rewrite to use the compacted source */ nir_instr_rewrite_src(&intrin->instr, &intrin->src[1], diff --git a/src/compiler/spirv/spirv_to_nir.c b/src/compiler/spirv/spirv_to_nir.c index 9a66b9a28cb..d877077fa3b 100644 --- a/src/compiler/spirv/spirv_to_nir.c +++ b/src/compiler/spirv/spirv_to_nir.c @@ -2458,7 +2458,7 @@ get_image_coord(struct vtn_builder *b, uint32_t value) for (unsigned i = 0; i < 4; i++) swizzle[i] = MIN2(i, dim - 1); - return nir_swizzle(&b->nb, coord->def, swizzle, 4, false); + return nir_swizzle(&b->nb, coord->def, swizzle, 4); } static nir_ssa_def * @@ -2470,7 +2470,7 @@ expand_to_vec4(nir_builder *b, nir_ssa_def *value) unsigned swiz[4]; for (unsigned i = 0; i < 4; i++) swiz[i] = i < value->num_components ? i : 0; - return nir_swizzle(b, value, swiz, 4, false); + return nir_swizzle(b, value, swiz, 4); } static void diff --git a/src/compiler/spirv/vtn_glsl450.c b/src/compiler/spirv/vtn_glsl450.c index adfdc1a790c..753e74cf73c 100644 --- a/src/compiler/spirv/vtn_glsl450.c +++ b/src/compiler/spirv/vtn_glsl450.c @@ -40,7 +40,7 @@ static nir_ssa_def * build_mat2_det(nir_builder *b, nir_ssa_def *col[2]) { unsigned swiz[2] = {1, 0 }; - nir_ssa_def *p = nir_fmul(b, col[0], nir_swizzle(b, col[1], swiz, 2, true)); + nir_ssa_def *p = nir_fmul(b, col[0], nir_swizzle(b, col[1], swiz, 2)); return nir_fsub(b, nir_channel(b, p, 0), nir_channel(b, p, 1)); } @@ -52,12 +52,12 @@ build_mat3_det(nir_builder *b, nir_ssa_def *col[3]) nir_ssa_def *prod0 = nir_fmul(b, col[0], - nir_fmul(b, nir_swizzle(b, col[1], yzx, 3, true), - nir_swizzle(b, col[2], zxy, 3, true))); + nir_fmul(b, nir_swizzle(b, col[1], yzx, 3), + nir_swizzle(b, col[2], zxy, 3))); nir_ssa_def *prod1 = nir_fmul(b, col[0], - nir_fmul(b, nir_swizzle(b, col[1], zxy, 3, true), - nir_swizzle(b, col[2], yzx, 3, true))); + nir_fmul(b, nir_swizzle(b, col[1], zxy, 3), + nir_swizzle(b, col[2], yzx, 3))); nir_ssa_def *diff = nir_fsub(b, prod0, prod1); @@ -76,9 +76,9 @@ build_mat4_det(nir_builder *b, nir_ssa_def **col) swiz[j] = j + (j >= i); nir_ssa_def *subcol[3]; - subcol[0] = nir_swizzle(b, col[1], swiz, 3, true); - subcol[1] = nir_swizzle(b, col[2], swiz, 3, true); - subcol[2] = nir_swizzle(b, col[3], swiz, 3, true); + subcol[0] = nir_swizzle(b, col[1], swiz, 3); + subcol[1] = nir_swizzle(b, col[2], swiz, 3); + subcol[2] = nir_swizzle(b, col[3], swiz, 3); subdet[i] = build_mat3_det(b, subcol); } @@ -130,7 +130,7 @@ build_mat_subdet(struct nir_builder *b, struct vtn_ssa_value *src, for (unsigned j = 0; j < size; j++) { if (j != col) { subcol[j - (j > col)] = nir_swizzle(b, src->elems[j]->def, - swiz, size - 1, true); + swiz, size - 1); } } diff --git a/src/gallium/auxiliary/nir/tgsi_to_nir.c b/src/gallium/auxiliary/nir/tgsi_to_nir.c index 09d7798b08d..aae74111840 100644 --- a/src/gallium/auxiliary/nir/tgsi_to_nir.c +++ b/src/gallium/auxiliary/nir/tgsi_to_nir.c @@ -107,7 +107,7 @@ struct ttn_compile { }; #define ttn_swizzle(b, src, x, y, z, w) \ - nir_swizzle(b, src, SWIZ(x, y, z, w), 4, false) + nir_swizzle(b, src, SWIZ(x, y, z, w), 4) #define ttn_channel(b, src, swiz) \ nir_channel(b, src, TGSI_SWIZZLE_##swiz) @@ -1357,7 +1357,7 @@ ttn_tex(struct ttn_compile *c, nir_alu_dest dest, nir_ssa_def **src) instr->src[src_number].src = nir_src_for_ssa(nir_swizzle(b, src[0], SWIZ(X, Y, Z, W), - instr->coord_components, false)); + instr->coord_components)); instr->src[src_number].src_type = nir_tex_src_coord; src_number++; @@ -1404,14 +1404,12 @@ ttn_tex(struct ttn_compile *c, nir_alu_dest dest, nir_ssa_def **src) instr->src[src_number].src_type = nir_tex_src_ddx; instr->src[src_number].src = nir_src_for_ssa(nir_swizzle(b, src[1], SWIZ(X, Y, Z, W), - nir_tex_instr_src_size(instr, src_number), - false)); + nir_tex_instr_src_size(instr, src_number))); src_number++; instr->src[src_number].src_type = nir_tex_src_ddy; instr->src[src_number].src = nir_src_for_ssa(nir_swizzle(b, src[2], SWIZ(X, Y, Z, W), - nir_tex_instr_src_size(instr, src_number), - false)); + nir_tex_instr_src_size(instr, src_number))); src_number++; } diff --git a/src/intel/compiler/brw_nir_attribute_workarounds.c b/src/intel/compiler/brw_nir_attribute_workarounds.c index 55a3b3e4546..ecd0f0752b0 100644 --- a/src/intel/compiler/brw_nir_attribute_workarounds.c +++ b/src/intel/compiler/brw_nir_attribute_workarounds.c @@ -80,7 +80,7 @@ apply_attr_wa_block(nir_block *block, struct attr_wa_state *state) /* Apply BGRA swizzle if required. */ if (wa_flags & BRW_ATTRIB_WA_BGRA) { - val = nir_swizzle(b, val, (unsigned[4]){2,1,0,3}, 4, true); + val = nir_swizzle(b, val, (unsigned[4]){2,1,0,3}, 4); } if (wa_flags & BRW_ATTRIB_WA_NORMALIZE) { diff --git a/src/intel/compiler/brw_nir_lower_mem_access_bit_sizes.c b/src/intel/compiler/brw_nir_lower_mem_access_bit_sizes.c index 342cf9ede87..5eff6639e51 100644 --- a/src/intel/compiler/brw_nir_lower_mem_access_bit_sizes.c +++ b/src/intel/compiler/brw_nir_lower_mem_access_bit_sizes.c @@ -230,7 +230,7 @@ lower_mem_store_bit_size(nir_builder *b, nir_intrinsic_instr *intrin) for (unsigned i = 0; i < store_src_comps; i++) src_swiz[i] = store_first_src_comp + i; nir_ssa_def *store_value = - nir_swizzle(b, value, src_swiz, store_src_comps, false); + nir_swizzle(b, value, src_swiz, store_src_comps); nir_ssa_def *packed = nir_bitcast_vector(b, store_value, store_bit_size); dup_mem_intrinsic(b, intrin, packed, start, diff --git a/src/mesa/program/prog_to_nir.c b/src/mesa/program/prog_to_nir.c index 52a1253230c..36e9b689b6b 100644 --- a/src/mesa/program/prog_to_nir.c +++ b/src/mesa/program/prog_to_nir.c @@ -412,11 +412,11 @@ ptn_xpd(nir_builder *b, nir_alu_dest dest, nir_ssa_def **src) ptn_move_dest_masked(b, dest, nir_fsub(b, nir_fmul(b, - nir_swizzle(b, src[0], SWIZ(Y, Z, X, W), 3, true), - nir_swizzle(b, src[1], SWIZ(Z, X, Y, W), 3, true)), + nir_swizzle(b, src[0], SWIZ(Y, Z, X, W), 3), + nir_swizzle(b, src[1], SWIZ(Z, X, Y, W), 3)), nir_fmul(b, - nir_swizzle(b, src[1], SWIZ(Y, Z, X, W), 3, true), - nir_swizzle(b, src[0], SWIZ(Z, X, Y, W), 3, true))), + nir_swizzle(b, src[1], SWIZ(Y, Z, X, W), 3), + nir_swizzle(b, src[0], SWIZ(Z, X, Y, W), 3))), WRITEMASK_XYZ); ptn_move_dest_masked(b, dest, nir_imm_float(b, 1.0), WRITEMASK_W); } @@ -580,7 +580,7 @@ ptn_tex(struct ptn_compile *c, nir_alu_dest dest, nir_ssa_def **src, instr->src[src_number].src = nir_src_for_ssa(nir_swizzle(b, src[0], SWIZ(X, Y, Z, W), - instr->coord_components, true)); + instr->coord_components)); instr->src[src_number].src_type = nir_tex_src_coord; src_number++; diff --git a/src/mesa/state_tracker/st_nir_lower_builtin.c b/src/mesa/state_tracker/st_nir_lower_builtin.c index ab74d3183dc..f6f9bf15278 100644 --- a/src/mesa/state_tracker/st_nir_lower_builtin.c +++ b/src/mesa/state_tracker/st_nir_lower_builtin.c @@ -209,7 +209,7 @@ lower_builtin_block(lower_builtin_state *state, nir_block *block) swiz[i] = GET_SWZ(element->swizzle, i); assert(swiz[i] <= SWIZZLE_W); } - def = nir_swizzle(b, def, swiz, intrin->num_components, true); + def = nir_swizzle(b, def, swiz, intrin->num_components); /* and rewrite uses of original instruction: */ assert(intrin->dest.is_ssa); |