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authorIan Romanick <[email protected]>2016-09-01 12:06:09 -0700
committerIan Romanick <[email protected]>2017-01-20 15:41:23 -0800
commitdb6d23cfd22fbe41e7e7de558c987c065e5f3e15 (patch)
treea23e4de731c9b1af3222bc8863d87abb8225da26 /src
parentfc16bf125f9428b57526a216e5097e31c94b7623 (diff)
i965: Enable ARB_gpu_shader_int64 on Gen8+
Signed-off-by: Ian Romanick <[email protected]> Reviewed-by: Matt Turner <[email protected]>
Diffstat (limited to 'src')
-rw-r--r--src/mesa/drivers/dri/i965/brw_link.cpp5
-rw-r--r--src/mesa/drivers/dri/i965/intel_extensions.c1
2 files changed, 6 insertions, 0 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_link.cpp b/src/mesa/drivers/dri/i965/brw_link.cpp
index 4159756fc5d..977feb37fc2 100644
--- a/src/mesa/drivers/dri/i965/brw_link.cpp
+++ b/src/mesa/drivers/dri/i965/brw_link.cpp
@@ -120,6 +120,11 @@ process_glsl_ir(struct brw_context *brw,
}
lower_instructions(shader->ir, instructions_to_lower);
+ lower_64bit_integer_instructions(shader->ir,
+ MUL64 |
+ DIV64 |
+ MOD64 |
+ SIGN64);
/* Pre-gen6 HW can only nest if-statements 16 deep. Beyond this,
* if-statements need to be flattened.
diff --git a/src/mesa/drivers/dri/i965/intel_extensions.c b/src/mesa/drivers/dri/i965/intel_extensions.c
index b674b2f494c..f1290bf7b49 100644
--- a/src/mesa/drivers/dri/i965/intel_extensions.c
+++ b/src/mesa/drivers/dri/i965/intel_extensions.c
@@ -264,6 +264,7 @@ intelInitExtensions(struct gl_context *ctx)
}
if (brw->gen >= 8) {
+ ctx->Extensions.ARB_gpu_shader_int64 = true;
ctx->Extensions.ARB_ES3_2_compatibility = true;
}