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authorPaul Berry <[email protected]>2014-01-10 21:39:25 -0800
committerJordan Justen <[email protected]>2015-05-02 00:34:28 -0700
commitd94a9e7041a0816747d25ec99089d1bc161d46e0 (patch)
treecf9ebebc84ccdad725701d44e2c3d1793c6e52ed /src
parentbf058dad6b97aaa2422c3ed462c4f27490719800 (diff)
i965: Add an INTEL_DEBUG=cs option.
At the moment it's not wired up to anything. Later patches will hook it up to the compute shader back-end. Reviewed-by: Jordan Justen <[email protected]> Reviewed-by: Kristian Høgsberg <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
Diffstat (limited to 'src')
-rw-r--r--src/mesa/drivers/dri/i965/intel_debug.c5
-rw-r--r--src/mesa/drivers/dri/i965/intel_debug.h1
2 files changed, 4 insertions, 2 deletions
diff --git a/src/mesa/drivers/dri/i965/intel_debug.c b/src/mesa/drivers/dri/i965/intel_debug.c
index 19be464a8fe..53f575ab78f 100644
--- a/src/mesa/drivers/dri/i965/intel_debug.c
+++ b/src/mesa/drivers/dri/i965/intel_debug.c
@@ -70,17 +70,18 @@ static const struct dri_debug_control debug_control[] = {
{ "no8", DEBUG_NO8 },
{ "vec4vs", DEBUG_VEC4VS },
{ "spill", DEBUG_SPILL },
+ { "cs", DEBUG_CS },
{ NULL, 0 }
};
uint64_t
intel_debug_flag_for_shader_stage(gl_shader_stage stage)
{
- int flags[] = {
+ uint64_t flags[] = {
[MESA_SHADER_VERTEX] = DEBUG_VS,
[MESA_SHADER_GEOMETRY] = DEBUG_GS,
[MESA_SHADER_FRAGMENT] = DEBUG_WM,
- [MESA_SHADER_COMPUTE] = 0, /* no debug flag yet */
+ [MESA_SHADER_COMPUTE] = DEBUG_CS,
};
STATIC_ASSERT(MESA_SHADER_STAGES == 4);
return flags[stage];
diff --git a/src/mesa/drivers/dri/i965/intel_debug.h b/src/mesa/drivers/dri/i965/intel_debug.h
index e0e9cb7c6c7..f754be20b1d 100644
--- a/src/mesa/drivers/dri/i965/intel_debug.h
+++ b/src/mesa/drivers/dri/i965/intel_debug.h
@@ -65,6 +65,7 @@ extern uint64_t INTEL_DEBUG;
#define DEBUG_NO8 (1ull << 29)
#define DEBUG_VEC4VS (1ull << 30)
#define DEBUG_SPILL (1ull << 31)
+#define DEBUG_CS (1ull << 32)
#ifdef HAVE_ANDROID_PLATFORM
#define LOG_TAG "INTEL-MESA"