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authorKenneth Graunke <[email protected]>2019-01-16 01:19:44 -0800
committerKenneth Graunke <[email protected]>2019-02-21 10:26:11 -0800
commitb9697dd820f618ddeb31f9b713bbef43cb11827d (patch)
treedd77328de1e91e8462cba08d6299d92cd2a63b96 /src
parent61798e3c88f299d14a084c10cfefa9d6679f0505 (diff)
iris: Fix SO issue with INTEL_DEBUG=reemit, set fewer bits
INTEL_DEBUG=reemit was breaking streamout tests, by re-emitting 3DSTATE_SO_BUFFER commands that tell the HW to zero the SO write offsets. We would need to alter them to use 0xFFFFFFFF for the offset. Also, have each upload function only flag bits relevant to its own pipeline.
Diffstat (limited to 'src')
-rw-r--r--src/gallium/drivers/iris/iris_draw.c7
1 files changed, 5 insertions, 2 deletions
diff --git a/src/gallium/drivers/iris/iris_draw.c b/src/gallium/drivers/iris/iris_draw.c
index 0dbe41a32e4..19df5482f5e 100644
--- a/src/gallium/drivers/iris/iris_draw.c
+++ b/src/gallium/drivers/iris/iris_draw.c
@@ -87,8 +87,11 @@ iris_draw_vbo(struct pipe_context *ctx, const struct pipe_draw_info *info)
if (ice->state.predicate == IRIS_PREDICATE_STATE_DONT_RENDER)
return;
+ /* We can't safely re-emit 3DSTATE_SO_BUFFERS because it may zero the
+ * write offsets, changing the behavior.
+ */
if (unlikely(INTEL_DEBUG & DEBUG_REEMIT))
- ice->state.dirty |= ~0ull;
+ ice->state.dirty |= IRIS_ALL_DIRTY_FOR_RENDER & ~IRIS_DIRTY_SO_BUFFERS;
iris_batch_maybe_flush(batch, 1500);
@@ -171,7 +174,7 @@ iris_launch_grid(struct pipe_context *ctx, const struct pipe_grid_info *grid)
return;
if (unlikely(INTEL_DEBUG & DEBUG_REEMIT))
- ice->state.dirty |= ~0ull;
+ ice->state.dirty |= IRIS_ALL_DIRTY_FOR_COMPUTE;
iris_batch_maybe_flush(batch, 1500);