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authorRafael Antognolli <[email protected]>2017-06-13 16:43:59 -0700
committerRafael Antognolli <[email protected]>2017-06-21 10:16:05 -0700
commit82c66965aca2e46ff643529bad1e0b0ce8ede92d (patch)
tree4c1b760c8d95ac043f2036ecf56e116a1ba071b0 /src
parenteddb1ebccf741267de48178e8da78b6b78045ca9 (diff)
intel/genxml: Normalize fields on WM_STATE.
On gen4, WM_STATE only has one Kernel Start Pointer and one GRF Register Count, but we can make the code that handles this on multiple gens simpler if we add an index 0 to it too. Signed-off-by: Rafael Antognolli <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
Diffstat (limited to 'src')
-rw-r--r--src/intel/genxml/gen4.xml4
-rw-r--r--src/intel/genxml/gen45.xml4
-rw-r--r--src/mesa/drivers/dri/i965/gen4_blorp_exec.h4
3 files changed, 6 insertions, 6 deletions
diff --git a/src/intel/genxml/gen4.xml b/src/intel/genxml/gen4.xml
index 5fcd6c9d503..33b487155e2 100644
--- a/src/intel/genxml/gen4.xml
+++ b/src/intel/genxml/gen4.xml
@@ -762,8 +762,8 @@
</struct>
<struct name="WM_STATE" length="8">
- <field name="Kernel Start Pointer" start="6" end="31" type="address"/>
- <field name="GRF Register Count" start="1" end="3" type="uint"/>
+ <field name="Kernel Start Pointer 0" start="6" end="31" type="address"/>
+ <field name="GRF Register Count 0" start="1" end="3" type="uint"/>
<field name="Single Program Flow" start="63" end="63" type="bool"/>
<field name="Binding Table Entry Count" start="50" end="57" type="uint"/>
<field name="Thread Priority" start="49" end="49" type="uint">
diff --git a/src/intel/genxml/gen45.xml b/src/intel/genxml/gen45.xml
index 864946a0686..b708c4fc216 100644
--- a/src/intel/genxml/gen45.xml
+++ b/src/intel/genxml/gen45.xml
@@ -776,8 +776,8 @@
</struct>
<struct name="WM_STATE" length="8">
- <field name="Kernel Start Pointer" start="6" end="31" type="address"/>
- <field name="GRF Register Count" start="1" end="3" type="uint"/>
+ <field name="Kernel Start Pointer 0" start="6" end="31" type="address"/>
+ <field name="GRF Register Count 0" start="1" end="3" type="uint"/>
<field name="Single Program Flow" start="63" end="63" type="bool"/>
<field name="Binding Table Entry Count" start="50" end="57" type="uint"/>
<field name="Thread Priority" start="49" end="49" type="uint">
diff --git a/src/mesa/drivers/dri/i965/gen4_blorp_exec.h b/src/mesa/drivers/dri/i965/gen4_blorp_exec.h
index 183c0da0af3..86c5e547b55 100644
--- a/src/mesa/drivers/dri/i965/gen4_blorp_exec.h
+++ b/src/mesa/drivers/dri/i965/gen4_blorp_exec.h
@@ -139,9 +139,9 @@ blorp_emit_wm_state(struct blorp_batch *batch,
wm._16PixelDispatchEnable = prog_data->dispatch_16;
#if GEN_GEN == 4
- wm.KernelStartPointer =
+ wm.KernelStartPointer0 =
instruction_state_address(batch, params->wm_prog_kernel);
- wm.GRFRegisterCount = prog_data->reg_blocks_0;
+ wm.GRFRegisterCount0 = prog_data->reg_blocks_0;
#else
wm.KernelStartPointer0 = params->wm_prog_kernel;
wm.GRFRegisterCount0 = prog_data->reg_blocks_0;