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authorDave Airlie <[email protected]>2018-05-21 14:00:37 +1000
committerDave Airlie <[email protected]>2018-06-11 08:35:03 +1000
commit77d7d7acab75571406866d24673c4a374a98c392 (patch)
tree52fa04c68f4b4f00f5f9a23973d3bade17764426 /src
parent135e4d434f622fa1d7275bdb72f859e1c1b1976e (diff)
virgl: enable ARB_gpu_shader_fp64
This enables ARB_gpu_shader_fp64 if the host provides it. Tested-by: Gurchetan Singh <[email protected]> Reviewed-by: Gurchetan Singh <[email protected]>
Diffstat (limited to 'src')
-rw-r--r--src/gallium/drivers/virgl/virgl_screen.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/src/gallium/drivers/virgl/virgl_screen.c b/src/gallium/drivers/virgl/virgl_screen.c
index e8d1c751779..2ba9708ebac 100644
--- a/src/gallium/drivers/virgl/virgl_screen.c
+++ b/src/gallium/drivers/virgl/virgl_screen.c
@@ -213,6 +213,8 @@ virgl_get_param(struct pipe_screen *screen, enum pipe_cap param)
return vscreen->caps.caps.v1.bset.transform_feedback_overflow_query;
case PIPE_CAP_SHADER_BUFFER_OFFSET_ALIGNMENT:
return vscreen->caps.caps.v2.shader_buffer_offset_alignment;
+ case PIPE_CAP_DOUBLES:
+ return vscreen->caps.caps.v1.bset.has_fp64;
case PIPE_CAP_TEXTURE_GATHER_SM5:
case PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT:
case PIPE_CAP_FAKE_SW_MSAA:
@@ -268,7 +270,6 @@ virgl_get_param(struct pipe_screen *screen, enum pipe_cap param)
case PIPE_CAP_POLYGON_MODE_FILL_RECTANGLE:
case PIPE_CAP_SPARSE_BUFFER_PAGE_SIZE:
case PIPE_CAP_TGSI_BALLOT:
- case PIPE_CAP_DOUBLES:
case PIPE_CAP_TGSI_TES_LAYER_VIEWPORT:
case PIPE_CAP_CAN_BIND_CONST_BUFFER_AS_VERTEX:
case PIPE_CAP_ALLOW_MAPPED_BUFFERS_DURING_EXECUTION: