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authorMarek Olšák <[email protected]>2015-11-06 23:06:47 +0100
committerMarek Olšák <[email protected]>2015-11-13 19:54:40 +0100
commit65d0c558d5dfa0d10f3f169dd5af65ccc69e1899 (patch)
treef1345113b40feec1c8cdc8675e33b7b47d916e34 /src
parent7f1e34e6c80b4cc59822eaf0c1731cab46befa46 (diff)
radeonsi: fix unaligned clear_buffer fallback
This is unreachable currently, but it will be used by unaligned 8-bit and 16-bit fills. Reviewed-by: Nicolai Hähnle <[email protected]>
Diffstat (limited to 'src')
-rw-r--r--src/gallium/drivers/radeonsi/si_cp_dma.c14
1 files changed, 8 insertions, 6 deletions
diff --git a/src/gallium/drivers/radeonsi/si_cp_dma.c b/src/gallium/drivers/radeonsi/si_cp_dma.c
index 418b2cf65c5..7b8c6d00395 100644
--- a/src/gallium/drivers/radeonsi/si_cp_dma.c
+++ b/src/gallium/drivers/radeonsi/si_cp_dma.c
@@ -176,12 +176,14 @@ static void si_clear_buffer(struct pipe_context *ctx, struct pipe_resource *dst,
/* Fallback for unaligned clears. */
if (offset % 4 != 0 || size % 4 != 0) {
- uint32_t *map = sctx->b.ws->buffer_map(r600_resource(dst)->cs_buf,
- sctx->b.rings.gfx.cs,
- PIPE_TRANSFER_WRITE);
- size /= 4;
- for (unsigned i = 0; i < size; i++)
- *map++ = value;
+ uint8_t *map = sctx->b.ws->buffer_map(r600_resource(dst)->cs_buf,
+ sctx->b.rings.gfx.cs,
+ PIPE_TRANSFER_WRITE);
+ map += offset;
+ for (unsigned i = 0; i < size; i++) {
+ unsigned byte_within_dword = (offset + i) % 4;
+ *map++ = (value >> (byte_within_dword * 8)) & 0xff;
+ }
return;
}