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authorJonathan Marek <[email protected]>2019-01-29 09:09:07 -0500
committerJason Ekstrand <[email protected]>2019-02-05 15:34:15 +0000
commit4f0a3c9f9eda65c77b295de9a6e7ff17b4658e57 (patch)
treefe2ce0bab996be5476e2b5cc0253652cec18d0db /src
parentb0b3de2be750966343fca96b7123340f8656f056 (diff)
nir: add missing vec opcodes in lower_bool_to_float
Signed-off-by: Jonathan Marek <[email protected]> Reviewed-by: Ian Romanick <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
Diffstat (limited to 'src')
-rw-r--r--src/compiler/nir/nir_lower_bool_to_float.c6
1 files changed, 6 insertions, 0 deletions
diff --git a/src/compiler/nir/nir_lower_bool_to_float.c b/src/compiler/nir/nir_lower_bool_to_float.c
index 52fc55c6b4c..b1d7e4493e9 100644
--- a/src/compiler/nir/nir_lower_bool_to_float.c
+++ b/src/compiler/nir/nir_lower_bool_to_float.c
@@ -52,6 +52,12 @@ lower_alu_instr(nir_builder *b, nir_alu_instr *alu)
/* Replacement SSA value */
nir_ssa_def *rep = NULL;
switch (alu->op) {
+ case nir_op_vec2:
+ case nir_op_vec3:
+ case nir_op_vec4:
+ /* These we expect to have booleans but the opcode doesn't change */
+ break;
+
case nir_op_b2f32: alu->op = nir_op_fmov; break;
case nir_op_b2i32: alu->op = nir_op_fmov; break;
case nir_op_f2b1: