diff options
| author | Marek Olšák <[email protected]> | 2015-11-05 23:56:38 +0100 |
|---|---|---|
| committer | Marek Olšák <[email protected]> | 2015-11-13 19:54:41 +0100 |
| commit | 40912dd91e96376517fb41bb4dc228b45fd1a01c (patch) | |
| tree | df2e928ade1e03af58747ff0dd7ab3b1856abcf8 /src | |
| parent | f7757100f22f0d22eb8c9f232915b9d9a28cc781 (diff) | |
radeonsi: initialize SX_PS_DOWNCONVERT to 0 on Stoney
otherwise the SX or CB blocks can go bananas
Reviewed-by: Nicolai Hähnle <[email protected]>
Cc: [email protected]
Diffstat (limited to 'src')
| -rw-r--r-- | src/gallium/drivers/radeonsi/si_state.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/src/gallium/drivers/radeonsi/si_state.c b/src/gallium/drivers/radeonsi/si_state.c index eba9c61ff26..6d97049c0f3 100644 --- a/src/gallium/drivers/radeonsi/si_state.c +++ b/src/gallium/drivers/radeonsi/si_state.c @@ -3444,6 +3444,9 @@ static void si_init_config(struct si_context *sctx) si_pm4_set_reg(pm4, R_028C5C_VGT_OUT_DEALLOC_CNTL, 32); } + if (sctx->b.family == CHIP_STONEY) + si_pm4_set_reg(pm4, R_028754_SX_PS_DOWNCONVERT, 0); + si_pm4_set_reg(pm4, R_028080_TA_BC_BASE_ADDR, border_color_va >> 8); if (sctx->b.chip_class >= CIK) si_pm4_set_reg(pm4, R_028084_TA_BC_BASE_ADDR_HI, border_color_va >> 40); |