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authorEric Anholt <[email protected]>2019-02-06 13:32:21 -0800
committerEric Anholt <[email protected]>2019-02-14 00:32:30 +0000
commit338d399fd01caec7f558bb469517baa318410e06 (patch)
tree8600db195bf03fe2578b622071714c6949fd416a /src
parent8f3694e1abfd702730014253af327060ac03aca1 (diff)
freedreno: Use the NIR lowering for isign.
I think this will save an instruction and hopefully not increase any other costs (possibly the immediate -1 and 1?), but I haven't actually tested. Reviewed-by: Kristian H. Kristensen <[email protected]>
Diffstat (limited to 'src')
-rw-r--r--src/freedreno/ir3/ir3_compiler_nir.c14
-rw-r--r--src/freedreno/ir3/ir3_nir.c1
2 files changed, 1 insertions, 14 deletions
diff --git a/src/freedreno/ir3/ir3_compiler_nir.c b/src/freedreno/ir3/ir3_compiler_nir.c
index fd641735620..03d8a2c7ba9 100644
--- a/src/freedreno/ir3/ir3_compiler_nir.c
+++ b/src/freedreno/ir3/ir3_compiler_nir.c
@@ -563,20 +563,6 @@ emit_alu(struct ir3_context *ctx, nir_alu_instr *alu)
case nir_op_ishr:
dst[0] = ir3_ASHR_B(b, src[0], 0, src[1], 0);
break;
- case nir_op_isign: {
- /* maybe this would be sane to lower in nir.. */
- struct ir3_instruction *neg, *pos;
-
- neg = ir3_CMPS_S(b, src[0], 0, create_immed(b, 0), 0);
- neg->cat2.condition = IR3_COND_LT;
-
- pos = ir3_CMPS_S(b, src[0], 0, create_immed(b, 0), 0);
- pos->cat2.condition = IR3_COND_GT;
-
- dst[0] = ir3_SUB_U(b, pos, 0, neg, 0);
-
- break;
- }
case nir_op_isub:
dst[0] = ir3_SUB_U(b, src[0], 0, src[1], 0);
break;
diff --git a/src/freedreno/ir3/ir3_nir.c b/src/freedreno/ir3/ir3_nir.c
index d9fcf798b3d..5c568bd75c7 100644
--- a/src/freedreno/ir3/ir3_nir.c
+++ b/src/freedreno/ir3/ir3_nir.c
@@ -40,6 +40,7 @@ static const nir_shader_compiler_options options = {
.lower_fmod32 = true,
.lower_fmod64 = true,
.lower_fdiv = true,
+ .lower_isign = true,
.lower_ldexp = true,
.fuse_ffma = true,
.native_integers = true,