diff options
| author | Ilia Mirkin <[email protected]> | 2017-03-01 11:09:30 -0500 |
|---|---|---|
| committer | Samuel Pitoiset <[email protected]> | 2017-03-04 17:48:27 +0100 |
| commit | 32dd8d59b6d1b6828e16e854d589d0f04536da14 (patch) | |
| tree | bc423e57e6c9101ee551ed90730859e2caff4ac3 /src | |
| parent | 66b62be4bb546de3a5bd10968f11cd892ca7d189 (diff) | |
nvc0: increase alignment to 256 for texture buffers on fermi
When binding as textures, the alignment can be 16. However when binding
as an image, the address has to be aligned to 256. (Also when binding as
an RT, but that can't happen with GL or current gallium APIs.)
Reported-by: Roy Spliet <[email protected]>
Signed-off-by: Ilia Mirkin <[email protected]>
Acked-by: Samuel Pitoiset <[email protected]>
Diffstat (limited to 'src')
| -rw-r--r-- | src/gallium/drivers/nouveau/nvc0/nvc0_screen.c | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c b/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c index 25c60f92ce3..643eb4305f8 100644 --- a/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c +++ b/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c @@ -147,7 +147,9 @@ nvc0_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param) case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT: return 256; case PIPE_CAP_TEXTURE_BUFFER_OFFSET_ALIGNMENT: - return 16; /* 256 for binding as RT, but that's not possible in GL */ + if (class_3d < NVE4_3D_CLASS) + return 256; /* IMAGE bindings require alignment to 256 */ + return 16; case PIPE_CAP_SHADER_BUFFER_OFFSET_ALIGNMENT: return 16; case PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT: |