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authorLionel Landwerlin <[email protected]>2019-02-20 12:49:17 +0000
committerLionel Landwerlin <[email protected]>2019-02-22 11:53:49 +0000
commit1d626fc02895daa9e7f7c74a829b9512f08869e8 (patch)
tree3ddb580c94b399f57c1c7ffe7eed8268834f7478 /src
parentbd2c5a8203851aa88ddbabe78408416db321c95d (diff)
intel: fix urb size for CFL GT1
Same 192Kb amount as SKL/KBL GT1 applies. Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Anuj Phogat <[email protected]> Fixes: de7ed0ba5522 ("i965/CFL: Add PCI Ids for Coffee Lake.")
Diffstat (limited to 'src')
-rw-r--r--src/intel/dev/gen_device_info.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/intel/dev/gen_device_info.c b/src/intel/dev/gen_device_info.c
index b30d31927a6..7c9b986f064 100644
--- a/src/intel/dev/gen_device_info.c
+++ b/src/intel/dev/gen_device_info.c
@@ -777,6 +777,7 @@ static const struct gen_device_info gen_device_info_cfl_gt1 = {
.num_subslices = { 2, },
.num_eu_per_subslice = 6,
.l3_banks = 2,
+ .urb.size = 192,
.simulator_id = 24,
};
static const struct gen_device_info gen_device_info_cfl_gt2 = {