diff options
author | Jason Ekstrand <[email protected]> | 2016-12-06 12:03:11 -0800 |
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committer | Jason Ekstrand <[email protected]> | 2016-12-13 15:48:13 -0800 |
commit | 157971e450c34ec430c295ff922c2e597294aba3 (patch) | |
tree | 05f5225e6c2aa671b4a94a80024677690c3e30a8 /src | |
parent | 9fe3f2649ea20d3ab736475faec6209fc3ff7c66 (diff) |
i965/blit: Fix the src dimension sanity check in miptree_copy
Reviewed-by: Topi Pohjolainen <[email protected]>
Cc: "13.0" <[email protected]>
Diffstat (limited to 'src')
-rw-r--r-- | src/mesa/drivers/dri/i965/intel_blit.c | 12 |
1 files changed, 10 insertions, 2 deletions
diff --git a/src/mesa/drivers/dri/i965/intel_blit.c b/src/mesa/drivers/dri/i965/intel_blit.c index 03a35ee0bd4..21a16e18c38 100644 --- a/src/mesa/drivers/dri/i965/intel_blit.c +++ b/src/mesa/drivers/dri/i965/intel_blit.c @@ -419,10 +419,18 @@ intel_miptree_copy(struct brw_context *brw, GLuint bw, bh; _mesa_get_format_block_size(src_mt->format, &bw, &bh); + /* Compressed textures need not have dimensions that are a multiple of + * the block size. Rectangles in compressed textures do need to be a + * multiple of the block size. The one exception is that the right and + * bottom edges may be at the right or bottom edge of the miplevel even + * if it's not aligned. + */ assert(src_x % bw == 0); assert(src_y % bh == 0); - assert(src_width % bw == 0); - assert(src_height % bh == 0); + assert(src_width % bw == 0 || + src_x + src_width == minify(src_mt->logical_width0, src_level)); + assert(src_height % bh == 0 || + src_y + src_height == minify(src_mt->logical_height0, src_level)); src_x /= (int)bw; src_y /= (int)bh; |