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authorTimothy Arceri <[email protected]>2016-10-03 10:39:28 +1100
committerTimothy Arceri <[email protected]>2016-10-03 15:29:51 +1100
commitb67633ce5e3ca29526f8378168ec312aa80c2861 (patch)
treeadeb24991db3a9803099663504f9a2090da35ffb /src
parentda274ba5f88ca76bb2e4369967cea381b9f219e4 (diff)
i965: rename max_hs_* variables to max_tcs_*
Using consistent naming allows us to create macros more easily. Reviewed-by: Kenneth Graunke <[email protected]>
Diffstat (limited to 'src')
-rw-r--r--src/intel/common/gen_device_info.c48
-rw-r--r--src/intel/common/gen_device_info.h4
-rw-r--r--src/intel/vulkan/anv_allocator.c2
-rw-r--r--src/mesa/drivers/dri/i965/brw_tcs.c2
-rw-r--r--src/mesa/drivers/dri/i965/gen7_hs_state.c2
-rw-r--r--src/mesa/drivers/dri/i965/gen7_urb.c4
-rw-r--r--src/mesa/drivers/dri/i965/gen8_hs_state.c2
7 files changed, 32 insertions, 32 deletions
diff --git a/src/intel/common/gen_device_info.c b/src/intel/common/gen_device_info.c
index 615605c18ba..b12bfad6ea3 100644
--- a/src/intel/common/gen_device_info.c
+++ b/src/intel/common/gen_device_info.c
@@ -118,7 +118,7 @@ static const struct gen_device_info gen_device_info_ivb_gt1 = {
GEN7_FEATURES, .is_ivybridge = true, .gt = 1,
.num_slices = 1,
.max_vs_threads = 36,
- .max_hs_threads = 36,
+ .max_tcs_threads = 36,
.max_ds_threads = 36,
.max_gs_threads = 36,
.max_wm_threads = 48,
@@ -127,7 +127,7 @@ static const struct gen_device_info gen_device_info_ivb_gt1 = {
.size = 128,
.min_vs_entries = 32,
.max_vs_entries = 512,
- .max_hs_entries = 32,
+ .max_tcs_entries = 32,
.min_ds_entries = 10,
.max_ds_entries = 288,
.max_gs_entries = 192,
@@ -138,7 +138,7 @@ static const struct gen_device_info gen_device_info_ivb_gt2 = {
GEN7_FEATURES, .is_ivybridge = true, .gt = 2,
.num_slices = 1,
.max_vs_threads = 128,
- .max_hs_threads = 128,
+ .max_tcs_threads = 128,
.max_ds_threads = 128,
.max_gs_threads = 128,
.max_wm_threads = 172,
@@ -147,7 +147,7 @@ static const struct gen_device_info gen_device_info_ivb_gt2 = {
.size = 256,
.min_vs_entries = 32,
.max_vs_entries = 704,
- .max_hs_entries = 64,
+ .max_tcs_entries = 64,
.min_ds_entries = 10,
.max_ds_entries = 448,
.max_gs_entries = 320,
@@ -159,7 +159,7 @@ static const struct gen_device_info gen_device_info_byt = {
.num_slices = 1,
.has_llc = false,
.max_vs_threads = 36,
- .max_hs_threads = 36,
+ .max_tcs_threads = 36,
.max_ds_threads = 36,
.max_gs_threads = 36,
.max_wm_threads = 48,
@@ -168,7 +168,7 @@ static const struct gen_device_info gen_device_info_byt = {
.size = 128,
.min_vs_entries = 32,
.max_vs_entries = 512,
- .max_hs_entries = 32,
+ .max_tcs_entries = 32,
.min_ds_entries = 10,
.max_ds_entries = 288,
.max_gs_entries = 192,
@@ -185,7 +185,7 @@ static const struct gen_device_info gen_device_info_hsw_gt1 = {
HSW_FEATURES, .gt = 1,
.num_slices = 1,
.max_vs_threads = 70,
- .max_hs_threads = 70,
+ .max_tcs_threads = 70,
.max_ds_threads = 70,
.max_gs_threads = 70,
.max_wm_threads = 102,
@@ -194,7 +194,7 @@ static const struct gen_device_info gen_device_info_hsw_gt1 = {
.size = 128,
.min_vs_entries = 32,
.max_vs_entries = 640,
- .max_hs_entries = 64,
+ .max_tcs_entries = 64,
.min_ds_entries = 10,
.max_ds_entries = 384,
.max_gs_entries = 256,
@@ -205,7 +205,7 @@ static const struct gen_device_info gen_device_info_hsw_gt2 = {
HSW_FEATURES, .gt = 2,
.num_slices = 1,
.max_vs_threads = 280,
- .max_hs_threads = 256,
+ .max_tcs_threads = 256,
.max_ds_threads = 280,
.max_gs_threads = 256,
.max_wm_threads = 204,
@@ -214,7 +214,7 @@ static const struct gen_device_info gen_device_info_hsw_gt2 = {
.size = 256,
.min_vs_entries = 64,
.max_vs_entries = 1664,
- .max_hs_entries = 128,
+ .max_tcs_entries = 128,
.min_ds_entries = 10,
.max_ds_entries = 960,
.max_gs_entries = 640,
@@ -225,7 +225,7 @@ static const struct gen_device_info gen_device_info_hsw_gt3 = {
HSW_FEATURES, .gt = 3,
.num_slices = 2,
.max_vs_threads = 280,
- .max_hs_threads = 256,
+ .max_tcs_threads = 256,
.max_ds_threads = 280,
.max_gs_threads = 256,
.max_wm_threads = 408,
@@ -234,7 +234,7 @@ static const struct gen_device_info gen_device_info_hsw_gt3 = {
.size = 512,
.min_vs_entries = 64,
.max_vs_entries = 1664,
- .max_hs_entries = 128,
+ .max_tcs_entries = 128,
.min_ds_entries = 10,
.max_ds_entries = 960,
.max_gs_entries = 640,
@@ -251,7 +251,7 @@ static const struct gen_device_info gen_device_info_hsw_gt3 = {
.supports_simd16_3src = true, \
.has_surface_tile_offset = true, \
.max_vs_threads = 504, \
- .max_hs_threads = 504, \
+ .max_tcs_threads = 504, \
.max_ds_threads = 504, \
.max_gs_threads = 504, \
.max_wm_threads = 384
@@ -264,7 +264,7 @@ static const struct gen_device_info gen_device_info_bdw_gt1 = {
.size = 192,
.min_vs_entries = 64,
.max_vs_entries = 2560,
- .max_hs_entries = 504,
+ .max_tcs_entries = 504,
.min_ds_entries = 34,
.max_ds_entries = 1536,
.max_gs_entries = 960,
@@ -279,7 +279,7 @@ static const struct gen_device_info gen_device_info_bdw_gt2 = {
.size = 384,
.min_vs_entries = 64,
.max_vs_entries = 2560,
- .max_hs_entries = 504,
+ .max_tcs_entries = 504,
.min_ds_entries = 34,
.max_ds_entries = 1536,
.max_gs_entries = 960,
@@ -294,7 +294,7 @@ static const struct gen_device_info gen_device_info_bdw_gt3 = {
.size = 384,
.min_vs_entries = 64,
.max_vs_entries = 2560,
- .max_hs_entries = 504,
+ .max_tcs_entries = 504,
.min_ds_entries = 34,
.max_ds_entries = 1536,
.max_gs_entries = 960,
@@ -306,7 +306,7 @@ static const struct gen_device_info gen_device_info_chv = {
.has_llc = false,
.num_slices = 1,
.max_vs_threads = 80,
- .max_hs_threads = 80,
+ .max_tcs_threads = 80,
.max_ds_threads = 80,
.max_gs_threads = 80,
.max_wm_threads = 128,
@@ -315,7 +315,7 @@ static const struct gen_device_info gen_device_info_chv = {
.size = 192,
.min_vs_entries = 34,
.max_vs_entries = 640,
- .max_hs_entries = 80,
+ .max_tcs_entries = 80,
.min_ds_entries = 34,
.max_ds_entries = 384,
.max_gs_entries = 256,
@@ -333,7 +333,7 @@ static const struct gen_device_info gen_device_info_chv = {
.has_surface_tile_offset = true, \
.max_vs_threads = 336, \
.max_gs_threads = 336, \
- .max_hs_threads = 336, \
+ .max_tcs_threads = 336, \
.max_ds_threads = 336, \
.max_wm_threads = 64 * 9, \
.max_cs_threads = 56, \
@@ -341,7 +341,7 @@ static const struct gen_device_info gen_device_info_chv = {
.size = 384, \
.min_vs_entries = 64, \
.max_vs_entries = 1856, \
- .max_hs_entries = 672, \
+ .max_tcs_entries = 672, \
.min_ds_entries = 34, \
.max_ds_entries = 1120, \
.max_gs_entries = 640, \
@@ -385,7 +385,7 @@ static const struct gen_device_info gen_device_info_bxt = {
.num_slices = 1,
.max_vs_threads = 112,
- .max_hs_threads = 112,
+ .max_tcs_threads = 112,
.max_ds_threads = 112,
.max_gs_threads = 112,
.max_wm_threads = 64 * 3,
@@ -394,7 +394,7 @@ static const struct gen_device_info gen_device_info_bxt = {
.size = 192,
.min_vs_entries = 34,
.max_vs_entries = 704,
- .max_hs_entries = 256,
+ .max_tcs_entries = 256,
.max_ds_entries = 416,
.max_gs_entries = 256,
}
@@ -408,7 +408,7 @@ static const struct gen_device_info gen_device_info_bxt_2x6 = {
.num_slices = 1,
.max_vs_threads = 56, /* XXX: guess */
- .max_hs_threads = 56, /* XXX: guess */
+ .max_tcs_threads = 56, /* XXX: guess */
.max_ds_threads = 56,
.max_gs_threads = 56,
.max_wm_threads = 64 * 2,
@@ -417,7 +417,7 @@ static const struct gen_device_info gen_device_info_bxt_2x6 = {
.size = 128,
.min_vs_entries = 34,
.max_vs_entries = 352,
- .max_hs_entries = 128,
+ .max_tcs_entries = 128,
.max_ds_entries = 208,
.max_gs_entries = 128,
}
diff --git a/src/intel/common/gen_device_info.h b/src/intel/common/gen_device_info.h
index 8b68a011ea4..40258d4239f 100644
--- a/src/intel/common/gen_device_info.h
+++ b/src/intel/common/gen_device_info.h
@@ -94,7 +94,7 @@ struct gen_device_info
*/
unsigned num_slices;
unsigned max_vs_threads; /**< Maximum Vertex Shader threads */
- unsigned max_hs_threads; /**< Maximum Hull Shader threads */
+ unsigned max_tcs_threads; /**< Maximum Hull Shader threads */
unsigned max_ds_threads; /**< Maximum Domain Shader threads */
unsigned max_gs_threads; /**< Maximum Geometry Shader threads. */
/**
@@ -135,7 +135,7 @@ struct gen_device_info
unsigned size;
unsigned min_vs_entries;
unsigned max_vs_entries;
- unsigned max_hs_entries;
+ unsigned max_tcs_entries;
unsigned min_ds_entries;
unsigned max_ds_entries;
unsigned max_gs_entries;
diff --git a/src/intel/vulkan/anv_allocator.c b/src/intel/vulkan/anv_allocator.c
index 83a701e0b0d..65fd38b1a04 100644
--- a/src/intel/vulkan/anv_allocator.c
+++ b/src/intel/vulkan/anv_allocator.c
@@ -949,7 +949,7 @@ anv_scratch_pool_alloc(struct anv_device *device, struct anv_scratch_pool *pool,
uint32_t max_threads[] = {
[MESA_SHADER_VERTEX] = devinfo->max_vs_threads,
- [MESA_SHADER_TESS_CTRL] = devinfo->max_hs_threads,
+ [MESA_SHADER_TESS_CTRL] = devinfo->max_tcs_threads,
[MESA_SHADER_TESS_EVAL] = devinfo->max_ds_threads,
[MESA_SHADER_GEOMETRY] = devinfo->max_gs_threads,
[MESA_SHADER_FRAGMENT] = devinfo->max_wm_threads,
diff --git a/src/mesa/drivers/dri/i965/brw_tcs.c b/src/mesa/drivers/dri/i965/brw_tcs.c
index d62ad662b49..1f1b1a575d2 100644
--- a/src/mesa/drivers/dri/i965/brw_tcs.c
+++ b/src/mesa/drivers/dri/i965/brw_tcs.c
@@ -298,7 +298,7 @@ brw_codegen_tcs_prog(struct brw_context *brw,
/* Scratch space is used for register spilling */
brw_alloc_stage_scratch(brw, stage_state,
prog_data.base.base.total_scratch,
- devinfo->max_hs_threads);
+ devinfo->max_tcs_threads);
brw_upload_cache(&brw->cache, BRW_CACHE_TCS_PROG,
key, sizeof(*key),
diff --git a/src/mesa/drivers/dri/i965/gen7_hs_state.c b/src/mesa/drivers/dri/i965/gen7_hs_state.c
index 759655b1966..932bfb14169 100644
--- a/src/mesa/drivers/dri/i965/gen7_hs_state.c
+++ b/src/mesa/drivers/dri/i965/gen7_hs_state.c
@@ -78,7 +78,7 @@ gen7_upload_hs_state(struct brw_context *brw)
GEN7_HS_SAMPLER_COUNT) |
SET_FIELD(prog_data->base.binding_table.size_bytes / 4,
GEN7_HS_BINDING_TABLE_ENTRY_COUNT) |
- (devinfo->max_hs_threads - 1));
+ (devinfo->max_tcs_threads - 1));
OUT_BATCH(GEN7_HS_ENABLE |
GEN7_HS_STATISTICS_ENABLE |
SET_FIELD(brw->tcs.prog_data->instances - 1,
diff --git a/src/mesa/drivers/dri/i965/gen7_urb.c b/src/mesa/drivers/dri/i965/gen7_urb.c
index 7eb587ca671..fb87a94caa3 100644
--- a/src/mesa/drivers/dri/i965/gen7_urb.c
+++ b/src/mesa/drivers/dri/i965/gen7_urb.c
@@ -313,7 +313,7 @@ gen7_upload_urb(struct brw_context *brw, unsigned vs_size,
DIV_ROUND_UP(hs_granularity * hs_entry_size_bytes,
chunk_size_bytes);
hs_wants =
- DIV_ROUND_UP(devinfo->urb.max_hs_entries * hs_entry_size_bytes,
+ DIV_ROUND_UP(devinfo->urb.max_tcs_entries * hs_entry_size_bytes,
chunk_size_bytes) - hs_chunks;
ds_chunks =
@@ -378,7 +378,7 @@ gen7_upload_urb(struct brw_context *brw, unsigned vs_size,
* than the maximum allowed amount, so correct for that.
*/
nr_vs_entries = MIN2(nr_vs_entries, devinfo->urb.max_vs_entries);
- nr_hs_entries = MIN2(nr_hs_entries, devinfo->urb.max_hs_entries);
+ nr_hs_entries = MIN2(nr_hs_entries, devinfo->urb.max_tcs_entries);
nr_ds_entries = MIN2(nr_ds_entries, devinfo->urb.max_ds_entries);
nr_gs_entries = MIN2(nr_gs_entries, devinfo->urb.max_gs_entries);
diff --git a/src/mesa/drivers/dri/i965/gen8_hs_state.c b/src/mesa/drivers/dri/i965/gen8_hs_state.c
index 7b9f6341e6c..14af89aaf32 100644
--- a/src/mesa/drivers/dri/i965/gen8_hs_state.c
+++ b/src/mesa/drivers/dri/i965/gen8_hs_state.c
@@ -45,7 +45,7 @@ gen8_upload_hs_state(struct brw_context *brw)
GEN7_HS_BINDING_TABLE_ENTRY_COUNT));
OUT_BATCH(GEN7_HS_ENABLE |
GEN7_HS_STATISTICS_ENABLE |
- (devinfo->max_hs_threads - 1) << GEN8_HS_MAX_THREADS_SHIFT |
+ (devinfo->max_tcs_threads - 1) << GEN8_HS_MAX_THREADS_SHIFT |
SET_FIELD(brw->tcs.prog_data->instances - 1,
GEN7_HS_INSTANCE_COUNT));
OUT_BATCH(stage_state->prog_offset);