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authorMarek Olšák <[email protected]>2011-08-19 22:57:56 +0200
committerMarek Olšák <[email protected]>2011-08-19 23:12:15 +0200
commitdb71537f01e0e6fd19e90bda6cfd727bb18832df (patch)
tree423f6edff9d1f81828e455599b98db8cb9eaa8a4 /src
parent754ea4ea76f1d5ac6150090cffe2542bdf178d87 (diff)
r600g: don't allocate separate depth and stencil for transfer textures on EG
The state tracker expects depth and stencil pixels interleaved. Evergreen can bind an interleaved depth-stencil resource as a colorbuffer, but not as a zbuffer. The hardware can do the interleaving for us when decompressing.
Diffstat (limited to 'src')
-rw-r--r--src/gallium/drivers/r600/r600_texture.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/src/gallium/drivers/r600/r600_texture.c b/src/gallium/drivers/r600/r600_texture.c
index 5681dd88e50..e41fe11ac97 100644
--- a/src/gallium/drivers/r600/r600_texture.c
+++ b/src/gallium/drivers/r600/r600_texture.c
@@ -394,7 +394,8 @@ r600_texture_create_object(struct pipe_screen *screen,
rtex->real_format = base->format;
/* We must split depth and stencil into two separate buffers on Evergreen. */
- if (r600_get_family_class(((struct r600_screen*)screen)->radeon) >= EVERGREEN &&
+ if (!(base->flags & R600_RESOURCE_FLAG_TRANSFER) &&
+ r600_get_family_class(((struct r600_screen*)screen)->radeon) >= EVERGREEN &&
util_format_is_depth_and_stencil(base->format)) {
struct pipe_resource stencil;
unsigned stencil_pitch_override = 0;