diff options
author | Jerome Glisse <[email protected]> | 2010-08-06 17:22:45 -0400 |
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committer | Jerome Glisse <[email protected]> | 2010-08-06 17:23:43 -0400 |
commit | 32251c34f06ef91759fa75271ce724a06483cc42 (patch) | |
tree | 042ba8c6e7e4d06190726e7168fd7fddc3a317f0 /src | |
parent | b474478f206c6d81af78696d3d5ce156d4d413d7 (diff) |
r600g: fix rendering, only enable target we write too
Signed-off-by: Jerome Glisse <[email protected]>
Diffstat (limited to 'src')
-rw-r--r-- | src/gallium/drivers/r600/r600_state.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/gallium/drivers/r600/r600_state.c b/src/gallium/drivers/r600/r600_state.c index 223f2f39008..ff621084d47 100644 --- a/src/gallium/drivers/r600/r600_state.c +++ b/src/gallium/drivers/r600/r600_state.c @@ -1224,14 +1224,14 @@ static struct radeon_state *r600_cb_cntl(struct r600_context *rctx) } if (pbs->independent_blend_enable) { - for (i = 0; i < 8; i++) { + for (i = 0; i < nr_cbufs; i++) { if (pbs->rt[i].blend_enable) { color_control |= S_028808_TARGET_BLEND_ENABLE(1 << i); } target_mask |= (pbs->rt[i].colormask << (4 * i)); } } else { - for (i = 0; i < 8; i++) { + for (i = 0; i < nr_cbufs; i++) { if (pbs->rt[0].blend_enable) { color_control |= S_028808_TARGET_BLEND_ENABLE(1 << i); } |