diff options
| author | Samuel Pitoiset <[email protected]> | 2019-06-25 11:48:27 +0200 |
|---|---|---|
| committer | Bas Nieuwenhuizen <[email protected]> | 2019-07-07 17:51:32 +0200 |
| commit | faf27ee9b30035be03e531f95f4b591c872271de (patch) | |
| tree | 2ad7952dbd2cd456a9d7ae6067cb092a2348fcc3 /src | |
| parent | 698f9e6fd343c5ea8f70b4be4dea395792649d53 (diff) | |
radv/gfx10: disable CLEAR_STATE
Signed-off-by: Samuel Pitoiset <[email protected]>
Reviewed-by: Bas Nieuwenhuizen <[email protected]>
Diffstat (limited to 'src')
| -rw-r--r-- | src/amd/vulkan/radv_device.c | 3 | ||||
| -rw-r--r-- | src/amd/vulkan/si_cmd_buffer.c | 4 |
2 files changed, 2 insertions, 5 deletions
diff --git a/src/amd/vulkan/radv_device.c b/src/amd/vulkan/radv_device.c index 2d5e5f511e0..e429192ce89 100644 --- a/src/amd/vulkan/radv_device.c +++ b/src/amd/vulkan/radv_device.c @@ -354,7 +354,8 @@ radv_physical_device_init(struct radv_physical_device *device, /* The mere presence of CLEAR_STATE in the IB causes random GPU hangs * on GFX6. */ - device->has_clear_state = device->rad_info.chip_class >= GFX7; + device->has_clear_state = device->rad_info.chip_class >= GFX7 && + device->rad_info.chip_class <= GFX9; device->cpdma_prefetch_writes_memory = device->rad_info.chip_class <= GFX8; diff --git a/src/amd/vulkan/si_cmd_buffer.c b/src/amd/vulkan/si_cmd_buffer.c index 7a2099d7d1a..b3d12df4575 100644 --- a/src/amd/vulkan/si_cmd_buffer.c +++ b/src/amd/vulkan/si_cmd_buffer.c @@ -161,10 +161,6 @@ si_emit_graphics(struct radv_physical_device *physical_device, { int i; - /* Only GFX6 can disable CLEAR_STATE for now. */ - assert(physical_device->has_clear_state || - physical_device->rad_info.chip_class == GFX6); - radeon_emit(cs, PKT3(PKT3_CONTEXT_CONTROL, 1, 0)); radeon_emit(cs, CONTEXT_CONTROL_LOAD_ENABLE(1)); radeon_emit(cs, CONTEXT_CONTROL_SHADOW_ENABLE(1)); |