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authorIan Romanick <[email protected]>2009-12-08 23:25:26 -0800
committerIan Romanick <[email protected]>2009-12-10 15:12:31 -0800
commite624b77eb2d594cde053c73a530836e05227126a (patch)
treec3a5392d52d1e666f75e317872b1afd84f962116 /src
parentb4a6169412819cc3a027c6a118f0537911145a30 (diff)
intel: Remove ARGB internal_format == GL_RGB hacks
Now that XRGB is supported, we don't need to hack around cases of an RGBA format buffer with an internal format of GL_RGB.
Diffstat (limited to 'src')
-rw-r--r--src/mesa/drivers/dri/i915/i830_texstate.c5
-rw-r--r--src/mesa/drivers/dri/i915/i915_texstate.c5
-rw-r--r--src/mesa/drivers/dri/i965/brw_wm_surface_state.c10
-rw-r--r--src/mesa/drivers/dri/intel/intel_span.c49
4 files changed, 17 insertions, 52 deletions
diff --git a/src/mesa/drivers/dri/i915/i830_texstate.c b/src/mesa/drivers/dri/i915/i830_texstate.c
index f4bbb53b863..ce409b3a60c 100644
--- a/src/mesa/drivers/dri/i915/i830_texstate.c
+++ b/src/mesa/drivers/dri/i915/i830_texstate.c
@@ -55,10 +55,7 @@ translate_texture_format(GLuint mesa_format, GLuint internal_format)
case MESA_FORMAT_ARGB4444:
return MAPSURF_16BIT | MT_16BIT_ARGB4444;
case MESA_FORMAT_ARGB8888:
- if (internal_format == GL_RGB)
- return MAPSURF_32BIT | MT_32BIT_XRGB8888;
- else
- return MAPSURF_32BIT | MT_32BIT_ARGB8888;
+ return MAPSURF_32BIT | MT_32BIT_ARGB8888;
case MESA_FORMAT_XRGB8888:
return MAPSURF_32BIT | MT_32BIT_XRGB8888;
case MESA_FORMAT_YCBCR_REV:
diff --git a/src/mesa/drivers/dri/i915/i915_texstate.c b/src/mesa/drivers/dri/i915/i915_texstate.c
index d6689af53f6..f52ff2bcc4a 100644
--- a/src/mesa/drivers/dri/i915/i915_texstate.c
+++ b/src/mesa/drivers/dri/i915/i915_texstate.c
@@ -56,10 +56,7 @@ translate_texture_format(gl_format mesa_format, GLuint internal_format,
case MESA_FORMAT_ARGB4444:
return MAPSURF_16BIT | MT_16BIT_ARGB4444;
case MESA_FORMAT_ARGB8888:
- if (internal_format == GL_RGB)
- return MAPSURF_32BIT | MT_32BIT_XRGB8888;
- else
- return MAPSURF_32BIT | MT_32BIT_ARGB8888;
+ return MAPSURF_32BIT | MT_32BIT_ARGB8888;
case MESA_FORMAT_XRGB8888:
return MAPSURF_32BIT | MT_32BIT_XRGB8888;
case MESA_FORMAT_YCBCR_REV:
diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
index 74cf66f9f8b..3f9b1fbfdc6 100644
--- a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
+++ b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
@@ -94,20 +94,14 @@ static GLuint translate_tex_format( gl_format mesa_format,
return BRW_SURFACEFORMAT_R8G8B8_UNORM;
case MESA_FORMAT_ARGB8888:
- if (internal_format == GL_RGB)
- return BRW_SURFACEFORMAT_B8G8R8X8_UNORM;
- else
- return BRW_SURFACEFORMAT_B8G8R8A8_UNORM;
+ return BRW_SURFACEFORMAT_B8G8R8A8_UNORM;
case MESA_FORMAT_XRGB8888:
return BRW_SURFACEFORMAT_B8G8R8X8_UNORM;
case MESA_FORMAT_RGBA8888_REV:
_mesa_problem(NULL, "unexpected format in i965:translate_tex_format()");
- if (internal_format == GL_RGB)
- return BRW_SURFACEFORMAT_R8G8B8X8_UNORM;
- else
- return BRW_SURFACEFORMAT_R8G8B8A8_UNORM;
+ return BRW_SURFACEFORMAT_R8G8B8A8_UNORM;
case MESA_FORMAT_RGB565:
return BRW_SURFACEFORMAT_B5G6R5_UNORM;
diff --git a/src/mesa/drivers/dri/intel/intel_span.c b/src/mesa/drivers/dri/intel/intel_span.c
index 725ba5c97d6..34c3d9df74c 100644
--- a/src/mesa/drivers/dri/intel/intel_span.c
+++ b/src/mesa/drivers/dri/intel/intel_span.c
@@ -638,13 +638,7 @@ intel_set_span_functions(struct intel_context *intel,
intel_gttmap_InitPointers_xRGB8888(rb);
break;
case MESA_FORMAT_ARGB8888:
- if (rb->_BaseFormat == GL_RGB) {
- /* XXX remove this code someday when we enable XRGB surfaces */
- /* 8888 RGBx */
- intel_gttmap_InitPointers_xRGB8888(rb);
- } else {
- intel_gttmap_InitPointers_ARGB8888(rb);
- }
+ intel_gttmap_InitPointers_ARGB8888(rb);
break;
case MESA_FORMAT_Z16:
intel_gttmap_InitDepthPointers_z16(rb);
@@ -731,35 +725,18 @@ intel_set_span_functions(struct intel_context *intel,
}
break;
case MESA_FORMAT_ARGB8888:
- if (rb->_BaseFormat == GL_RGB) {
- /* XXX remove this code someday when we enable XRGB surfaces */
- /* 8888 RGBx */
- switch (tiling) {
- case I915_TILING_NONE:
- default:
- intelInitPointers_xRGB8888(rb);
- break;
- case I915_TILING_X:
- intel_XTile_InitPointers_xRGB8888(rb);
- break;
- case I915_TILING_Y:
- intel_YTile_InitPointers_xRGB8888(rb);
- break;
- }
- } else {
- /* 8888 RGBA */
- switch (tiling) {
- case I915_TILING_NONE:
- default:
- intelInitPointers_ARGB8888(rb);
- break;
- case I915_TILING_X:
- intel_XTile_InitPointers_ARGB8888(rb);
- break;
- case I915_TILING_Y:
- intel_YTile_InitPointers_ARGB8888(rb);
- break;
- }
+ /* 8888 RGBA */
+ switch (tiling) {
+ case I915_TILING_NONE:
+ default:
+ intelInitPointers_ARGB8888(rb);
+ break;
+ case I915_TILING_X:
+ intel_XTile_InitPointers_ARGB8888(rb);
+ break;
+ case I915_TILING_Y:
+ intel_YTile_InitPointers_ARGB8888(rb);
+ break;
}
break;
case MESA_FORMAT_Z16: