diff options
| author | Marek Olšák <[email protected]> | 2017-04-27 02:18:53 +0200 |
|---|---|---|
| committer | Marek Olšák <[email protected]> | 2017-05-05 00:23:44 +0200 |
| commit | e107c5a426dfe38fc17db9915b207b11e107fb52 (patch) | |
| tree | ccfd97344761ef64b7dba54314a2be1506c965f9 /src | |
| parent | a47289f8fc5619bee66cb61a08cdeadcf084ad46 (diff) | |
radeonsi/gfx9: set correct LLVM calling conventions for merged shaders
for scratch support
Reviewed-by: Nicolai Hähnle <[email protected]>
Diffstat (limited to 'src')
| -rw-r--r-- | src/gallium/drivers/radeonsi/si_shader.c | 1 | ||||
| -rw-r--r-- | src/gallium/drivers/radeonsi/si_shader_tgsi_setup.c | 19 |
2 files changed, 18 insertions, 2 deletions
diff --git a/src/gallium/drivers/radeonsi/si_shader.c b/src/gallium/drivers/radeonsi/si_shader.c index efdaef361fa..cf4b83b9e73 100644 --- a/src/gallium/drivers/radeonsi/si_shader.c +++ b/src/gallium/drivers/radeonsi/si_shader.c @@ -6442,6 +6442,7 @@ void si_shader_binary_read_config(struct ac_shader_binary *binary, case R_00B028_SPI_SHADER_PGM_RSRC1_PS: case R_00B128_SPI_SHADER_PGM_RSRC1_VS: case R_00B228_SPI_SHADER_PGM_RSRC1_GS: + case R_00B428_SPI_SHADER_PGM_RSRC1_HS: case R_00B848_COMPUTE_PGM_RSRC1: conf->num_sgprs = MAX2(conf->num_sgprs, (G_00B028_SGPRS(value) + 1) * 8); conf->num_vgprs = MAX2(conf->num_vgprs, (G_00B028_VGPRS(value) + 1) * 4); diff --git a/src/gallium/drivers/radeonsi/si_shader_tgsi_setup.c b/src/gallium/drivers/radeonsi/si_shader_tgsi_setup.c index de671ef80d6..f717299e78a 100644 --- a/src/gallium/drivers/radeonsi/si_shader_tgsi_setup.c +++ b/src/gallium/drivers/radeonsi/si_shader_tgsi_setup.c @@ -55,6 +55,7 @@ enum si_llvm_calling_convention { RADEON_LLVM_AMDGPU_GS = 88, RADEON_LLVM_AMDGPU_PS = 89, RADEON_LLVM_AMDGPU_CS = 90, + RADEON_LLVM_AMDGPU_HS = 93, }; void si_llvm_add_attribute(LLVMValueRef F, const char *name, int value) @@ -1362,6 +1363,7 @@ void si_llvm_create_func(struct si_shader_context *ctx, LLVMTypeRef main_fn_type, ret_type; LLVMBasicBlockRef main_fn_body; enum si_llvm_calling_convention call_conv; + unsigned real_shader_type; if (num_return_elems) ret_type = LLVMStructTypeInContext(ctx->gallivm.context, @@ -1378,12 +1380,25 @@ void si_llvm_create_func(struct si_shader_context *ctx, ctx->main_fn, "main_body"); LLVMPositionBuilderAtEnd(ctx->gallivm.builder, main_fn_body); - switch (ctx->type) { + real_shader_type = ctx->type; + + /* LS is merged into HS (TCS), and ES is merged into GS. */ + if (ctx->screen->b.chip_class >= GFX9) { + if (ctx->shader->key.as_ls) + real_shader_type = PIPE_SHADER_TESS_CTRL; + else if (ctx->shader->key.as_es) + real_shader_type = PIPE_SHADER_GEOMETRY; + } + + switch (real_shader_type) { case PIPE_SHADER_VERTEX: - case PIPE_SHADER_TESS_CTRL: case PIPE_SHADER_TESS_EVAL: call_conv = RADEON_LLVM_AMDGPU_VS; break; + case PIPE_SHADER_TESS_CTRL: + call_conv = HAVE_LLVM >= 0x0500 ? RADEON_LLVM_AMDGPU_HS : + RADEON_LLVM_AMDGPU_VS; + break; case PIPE_SHADER_GEOMETRY: call_conv = RADEON_LLVM_AMDGPU_GS; break; |