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authorIlia Mirkin <[email protected]>2015-04-30 02:00:20 -0400
committerIlia Mirkin <[email protected]>2015-07-23 03:33:09 -0400
commitda89e75d9c6399c8fb0286460c91a77778c0eec9 (patch)
treec0567de63534961bd464f70c9ba893cdbaf8a2e0 /src
parent77672cdb64e9c19e974fe5985050709fc317498e (diff)
nvc0/ir: allow tess eval output loads to be CSE'd
These only happen for gl_TessCoord which are constant. Signed-off-by: Ilia Mirkin <[email protected]>
Diffstat (limited to 'src')
-rw-r--r--src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp2
1 files changed, 2 insertions, 0 deletions
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
index ad9bf6f4aa9..e9648aa7b91 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
@@ -2518,6 +2518,8 @@ Instruction::isResultEqual(const Instruction *that) const
case FILE_MEMORY_CONST:
case FILE_SHADER_INPUT:
return true;
+ case FILE_SHADER_OUTPUT:
+ return bb->getProgram()->getType() == Program::TYPE_TESSELLATION_EVAL;
default:
return false;
}