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authorSamuel Pitoiset <[email protected]>2019-07-04 08:54:49 +0200
committerSamuel Pitoiset <[email protected]>2019-07-04 12:22:46 +0200
commitcce26458108d5b0974a689674c7774e9199cdbe5 (patch)
treeeff3a9247ffcbc74ff7eb9e35337847eda97895c /src
parent8a425e057d7e47439d95c3be4405858ec66df3e4 (diff)
radv: do not crash when generating binning state for unknown chips
These values are only useful if binning is disabled. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
Diffstat (limited to 'src')
-rw-r--r--src/amd/vulkan/radv_pipeline.c44
1 files changed, 22 insertions, 22 deletions
diff --git a/src/amd/vulkan/radv_pipeline.c b/src/amd/vulkan/radv_pipeline.c
index 71d3be240b2..49687405705 100644
--- a/src/amd/vulkan/radv_pipeline.c
+++ b/src/amd/vulkan/radv_pipeline.c
@@ -2691,29 +2691,29 @@ radv_pipeline_generate_binning_state(struct radeon_cmdbuf *ctx_cs,
VkExtent2D bin_size = radv_compute_bin_size(pipeline, pCreateInfo);
- unsigned context_states_per_bin; /* allowed range: [1, 6] */
- unsigned persistent_states_per_bin; /* allowed range: [1, 32] */
- unsigned fpovs_per_batch; /* allowed range: [0, 255], 0 = unlimited */
-
- switch (pipeline->device->physical_device->rad_info.family) {
- case CHIP_VEGA10:
- case CHIP_VEGA12:
- case CHIP_VEGA20:
- context_states_per_bin = 1;
- persistent_states_per_bin = 1;
- fpovs_per_batch = 63;
- break;
- case CHIP_RAVEN:
- case CHIP_RAVEN2:
- context_states_per_bin = 6;
- persistent_states_per_bin = 32;
- fpovs_per_batch = 63;
- break;
- default:
- unreachable("unhandled family while determining binning state.");
- }
-
if (pipeline->device->pbb_allowed && bin_size.width && bin_size.height) {
+ unsigned context_states_per_bin; /* allowed range: [1, 6] */
+ unsigned persistent_states_per_bin; /* allowed range: [1, 32] */
+ unsigned fpovs_per_batch; /* allowed range: [0, 255], 0 = unlimited */
+
+ switch (pipeline->device->physical_device->rad_info.family) {
+ case CHIP_VEGA10:
+ case CHIP_VEGA12:
+ case CHIP_VEGA20:
+ context_states_per_bin = 1;
+ persistent_states_per_bin = 1;
+ fpovs_per_batch = 63;
+ break;
+ case CHIP_RAVEN:
+ case CHIP_RAVEN2:
+ context_states_per_bin = 6;
+ persistent_states_per_bin = 32;
+ fpovs_per_batch = 63;
+ break;
+ default:
+ unreachable("unhandled family while determining binning state.");
+ }
+
pa_sc_binner_cntl_0 =
S_028C44_BINNING_MODE(V_028C44_BINNING_ALLOWED) |
S_028C44_BIN_SIZE_X(bin_size.width == 16) |