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authorMarek Olšák <[email protected]>2016-11-29 21:19:52 +0100
committerMarek Olšák <[email protected]>2016-12-01 02:16:51 +0100
commita816c7fe07bf16325c11bc692486ffb6d1e8b670 (patch)
tree5430dd16c32640910a948038131f560c3cde2a9d /src
parentda7453666aecd49e277a291c17dc7ef602643055 (diff)
radeonsi: add a tess+GS hang workaround for VI dGPUs
ported from Vulkan Cc: 13.0 <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
Diffstat (limited to 'src')
-rw-r--r--src/gallium/drivers/radeonsi/si_state_draw.c12
1 files changed, 10 insertions, 2 deletions
diff --git a/src/gallium/drivers/radeonsi/si_state_draw.c b/src/gallium/drivers/radeonsi/si_state_draw.c
index cba5a03bebe..cae19dc5a7a 100644
--- a/src/gallium/drivers/radeonsi/si_state_draw.c
+++ b/src/gallium/drivers/radeonsi/si_state_draw.c
@@ -296,10 +296,18 @@ static unsigned si_get_ia_multi_vgt_param(struct si_context *sctx,
/* Needed for 028B6C_DISTRIBUTION_MODE != 0 */
if (sctx->screen->has_distributed_tess) {
- if (sctx->gs_shader.cso)
+ if (sctx->gs_shader.cso) {
partial_es_wave = true;
- else
+
+ /* GPU hang workaround. */
+ if (sctx->b.family == CHIP_TONGA ||
+ sctx->b.family == CHIP_FIJI ||
+ sctx->b.family == CHIP_POLARIS10 ||
+ sctx->b.family == CHIP_POLARIS11)
+ partial_vs_wave = true;
+ } else {
partial_vs_wave = true;
+ }
}
}