diff options
| author | Alyssa Rosenzweig <[email protected]> | 2019-07-30 10:49:13 -0700 |
|---|---|---|
| committer | Alyssa Rosenzweig <[email protected]> | 2019-07-30 10:49:13 -0700 |
| commit | a3c59f9f000067435a80d971956bbd761811e0ac (patch) | |
| tree | 9d8734f83e716ab5ffbc437e1b02e11296719b62 /src | |
| parent | 7deb5ec0e89769382fb5dd86aa5305001ae413fa (diff) | |
pan/midgard: Nothing to see here, move along folks
Fixes: dee1e18fe4f ("pan/midgard: Cleanup ops table")
Signed-off-by: Alyssa Rosenzweig <[email protected]>
Diffstat (limited to 'src')
| -rw-r--r-- | src/panfrost/midgard/midgard_ops.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/src/panfrost/midgard/midgard_ops.c b/src/panfrost/midgard/midgard_ops.c index 040cfa0adad..f125c505832 100644 --- a/src/panfrost/midgard/midgard_ops.c +++ b/src/panfrost/midgard/midgard_ops.c @@ -88,10 +88,10 @@ struct mir_op_props alu_opcode_props[256] = { [midgard_alu_op_ule] = {"ule", UNITS_MOST}, /* csel must run in the second pipeline stage (r31 written in first) */ - [midgard_alu_op_icsel] = {"icsel", UNITS_VADD | UNIT_SMUL}, - [midgard_alu_op_icsel_v] = {"icsel_v", UNITS_VADD | UNIT_SMUL}, /* Acts as bitselect() */ - [midgard_alu_op_fcsel_v] = {"fcsel_v", UNITS_VADD | UNIT_SMUL}, - [midgard_alu_op_fcsel] = {"fcsel", UNITS_VADD | UNIT_SMUL}, + [midgard_alu_op_icsel] = {"icsel", UNIT_VADD | UNIT_SMUL}, + [midgard_alu_op_icsel_v] = {"icsel_v", UNIT_VADD | UNIT_SMUL}, /* Acts as bitselect() */ + [midgard_alu_op_fcsel_v] = {"fcsel_v", UNIT_VADD | UNIT_SMUL}, + [midgard_alu_op_fcsel] = {"fcsel", UNIT_VADD | UNIT_SMUL}, [midgard_alu_op_frcp] = {"frcp", UNIT_VLUT}, [midgard_alu_op_frsqrt] = {"frsqrt", UNIT_VLUT}, |