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authorMarek Olšák <[email protected]>2018-04-30 23:55:31 -0400
committerMarek Olšák <[email protected]>2018-05-10 18:34:32 -0400
commit9d00580e75f1d223e2dfa312da062fbb252b71a6 (patch)
tree7e68eb422d30b426e348440165c4f8e6e933744f /src
parent912b0163dc5d6929d8a9ae4c6d475807e764832a (diff)
radeonsi: support creating EQAA color textures
Reviewed-by: Nicolai Hähnle <[email protected]>
Diffstat (limited to 'src')
-rw-r--r--src/gallium/drivers/radeonsi/si_clear.c4
-rw-r--r--src/gallium/drivers/radeonsi/si_pipe.h1
-rw-r--r--src/gallium/drivers/radeonsi/si_texture.c45
3 files changed, 33 insertions, 17 deletions
diff --git a/src/gallium/drivers/radeonsi/si_clear.c b/src/gallium/drivers/radeonsi/si_clear.c
index 0f3546b02da..23977186611 100644
--- a/src/gallium/drivers/radeonsi/si_clear.c
+++ b/src/gallium/drivers/radeonsi/si_clear.c
@@ -247,7 +247,7 @@ void vi_dcc_clear_level(struct si_context *sctx,
assert(rtex->buffer.b.b.last_level == 0);
/* 4x and 8x MSAA needs a sophisticated compute shader for
* the clear. See AMDVLK. */
- assert(rtex->buffer.b.b.nr_samples <= 2);
+ assert(rtex->num_color_samples <= 2);
clear_size = rtex->surface.dcc_size;
} else {
unsigned num_layers = util_num_layers(&rtex->buffer.b.b, level);
@@ -258,7 +258,7 @@ void vi_dcc_clear_level(struct si_context *sctx,
* dcc_fast_clear_size bytes for each layer. A compute shader
* would be more efficient than separate per-layer clear operations.
*/
- assert(rtex->buffer.b.b.nr_samples <= 2 || num_layers == 1);
+ assert(rtex->num_color_samples <= 2 || num_layers == 1);
dcc_offset += rtex->surface.u.legacy.level[level].dcc_offset;
clear_size = rtex->surface.u.legacy.level[level].dcc_fast_clear_size *
diff --git a/src/gallium/drivers/radeonsi/si_pipe.h b/src/gallium/drivers/radeonsi/si_pipe.h
index b5caf944759..241385baed7 100644
--- a/src/gallium/drivers/radeonsi/si_pipe.h
+++ b/src/gallium/drivers/radeonsi/si_pipe.h
@@ -254,6 +254,7 @@ struct r600_texture {
unsigned color_clear_value[2];
unsigned last_msaa_resolve_target_micro_mode;
unsigned num_level0_transfers;
+ unsigned num_color_samples;
/* Depth buffer compression and fast clear. */
uint64_t htile_offset;
diff --git a/src/gallium/drivers/radeonsi/si_texture.c b/src/gallium/drivers/radeonsi/si_texture.c
index 1e328b90b62..52b8b87732f 100644
--- a/src/gallium/drivers/radeonsi/si_texture.c
+++ b/src/gallium/drivers/radeonsi/si_texture.c
@@ -220,6 +220,7 @@ static unsigned si_texture_get_offset(struct si_screen *sscreen,
static int si_init_surface(struct si_screen *sscreen,
struct radeon_surf *surface,
const struct pipe_resource *ptex,
+ unsigned num_color_samples,
enum radeon_surf_mode array_mode,
unsigned pitch_in_bytes_override,
unsigned offset,
@@ -274,13 +275,13 @@ static int si_init_surface(struct si_screen *sscreen,
/* VI: DCC clear for 4x and 8x MSAA array textures unimplemented. */
if (sscreen->info.chip_class == VI &&
- ptex->nr_samples >= 4 &&
+ num_color_samples >= 4 &&
ptex->array_size > 1)
flags |= RADEON_SURF_DISABLE_DCC;
/* GFX9: DCC clear for 4x and 8x MSAA textures unimplemented. */
if (sscreen->info.chip_class >= GFX9 &&
- ptex->nr_samples >= 4)
+ num_color_samples >= 4)
flags |= RADEON_SURF_DISABLE_DCC;
if (ptex->bind & PIPE_BIND_SCANOUT || is_scanout) {
@@ -301,7 +302,7 @@ static int si_init_surface(struct si_screen *sscreen,
if (!(ptex->flags & SI_RESOURCE_FLAG_FORCE_TILING))
flags |= RADEON_SURF_OPTIMIZE_FOR_SPACE;
- r = sscreen->ws->surface_init(sscreen->ws, ptex, ptex->nr_samples,
+ r = sscreen->ws->surface_init(sscreen->ws, ptex, num_color_samples,
flags, bpe, array_mode, surface);
if (r) {
return r;
@@ -1145,6 +1146,7 @@ void si_print_texture_info(struct si_screen *sscreen,
static struct r600_texture *
si_texture_create_object(struct pipe_screen *screen,
const struct pipe_resource *base,
+ unsigned num_color_samples,
struct pb_buffer *buf,
struct radeon_surf *surface)
{
@@ -1168,6 +1170,7 @@ si_texture_create_object(struct pipe_screen *screen,
rtex->surface = *surface;
rtex->size = rtex->surface.surf_size;
+ rtex->num_color_samples = num_color_samples;
rtex->tc_compatible_htile = rtex->surface.htile_size != 0 &&
(rtex->surface.flags &
@@ -1384,6 +1387,12 @@ si_choose_tiling(struct si_screen *sscreen,
return RADEON_SURF_MODE_2D;
}
+static unsigned si_get_num_color_samples(const struct pipe_resource *templ,
+ bool imported)
+{
+ return CLAMP(templ->nr_samples, 1, 8);
+}
+
struct pipe_resource *si_texture_create(struct pipe_screen *screen,
const struct pipe_resource *templ)
{
@@ -1404,10 +1413,10 @@ struct pipe_resource *si_texture_create(struct pipe_screen *screen,
!is_flushed_depth &&
templ->nr_samples <= 1 && /* TC-compat HTILE is less efficient with MSAA */
util_format_is_depth_or_stencil(templ->format);
-
+ unsigned num_color_samples = si_get_num_color_samples(templ, false);
int r;
- r = si_init_surface(sscreen, &surface, templ,
+ r = si_init_surface(sscreen, &surface, templ, num_color_samples,
si_choose_tiling(sscreen, templ, tc_compatible_htile),
0, 0, false, false, is_flushed_depth,
tc_compatible_htile);
@@ -1416,7 +1425,8 @@ struct pipe_resource *si_texture_create(struct pipe_screen *screen,
}
return (struct pipe_resource *)
- si_texture_create_object(screen, templ, NULL, &surface);
+ si_texture_create_object(screen, templ, num_color_samples,
+ NULL, &surface);
}
static struct pipe_resource *si_texture_from_handle(struct pipe_screen *screen,
@@ -1447,13 +1457,17 @@ static struct pipe_resource *si_texture_from_handle(struct pipe_screen *screen,
si_surface_import_metadata(sscreen, &surface, &metadata,
&array_mode, &is_scanout);
- r = si_init_surface(sscreen, &surface, templ, array_mode, stride,
- offset, true, is_scanout, false, false);
+ unsigned num_color_samples = si_get_num_color_samples(templ, true);
+
+ r = si_init_surface(sscreen, &surface, templ, num_color_samples,
+ array_mode, stride, offset, true, is_scanout,
+ false, false);
if (r) {
return NULL;
}
- rtex = si_texture_create_object(screen, templ, buf, &surface);
+ rtex = si_texture_create_object(screen, templ, num_color_samples,
+ buf, &surface);
if (!rtex)
return NULL;
@@ -2375,17 +2389,18 @@ si_texture_from_memobj(struct pipe_screen *screen,
*/
array_mode = RADEON_SURF_MODE_LINEAR_ALIGNED;
is_scanout = false;
-
}
- r = si_init_surface(sscreen, &surface, templ,
- array_mode, memobj->stride,
- offset, true, is_scanout,
- false, false);
+ unsigned num_color_samples = si_get_num_color_samples(templ, true);
+
+ r = si_init_surface(sscreen, &surface, templ, num_color_samples,
+ array_mode, memobj->stride, offset, true,
+ is_scanout, false, false);
if (r)
return NULL;
- rtex = si_texture_create_object(screen, templ, memobj->buf, &surface);
+ rtex = si_texture_create_object(screen, templ, num_color_samples,
+ memobj->buf, &surface);
if (!rtex)
return NULL;