diff options
| author | Kenneth Graunke <[email protected]> | 2020-01-21 16:46:24 -0800 |
|---|---|---|
| committer | Marge Bot <[email protected]> | 2020-01-23 02:16:50 +0000 |
| commit | 8dc0540a171627cb502f76c75a29a43a86328a95 (patch) | |
| tree | 4b56160f3f3b9a4167575fe17d8bef9e8851e564 /src | |
| parent | 4413537c80b58978f61f468a5a36d1d75756d6b3 (diff) | |
intel: Fix aux map alignments on 32-bit builds.
ALIGN() brilliantly uses uintptr_t, making it unsafe for use with 64-bit
GPU addresses in 32-bit builds of the driver. Use align64() instead,
which uses uint64_t.
Fixes assertion failures when running any 32-bit program on Tigerlake.
Fixes: 2e6a7ced4db ("iris/gen12: Write GFX_AUX_TABLE base address register")
Fixes: 0d0290bb3f7 ("intel/common: Add surface to aux map translation table support")
Reviewed-by: Jordan Justen <[email protected]>
Reviewed-by: Jason Ekstrand <[email protected]>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3507>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3507>
Diffstat (limited to 'src')
| -rw-r--r-- | src/gallium/drivers/iris/iris_state.c | 2 | ||||
| -rw-r--r-- | src/intel/common/gen_aux_map.c | 8 |
2 files changed, 5 insertions, 5 deletions
diff --git a/src/gallium/drivers/iris/iris_state.c b/src/gallium/drivers/iris/iris_state.c index df0f98abf1b..f3619279656 100644 --- a/src/gallium/drivers/iris/iris_state.c +++ b/src/gallium/drivers/iris/iris_state.c @@ -5128,7 +5128,7 @@ genX(emit_aux_map_state)(struct iris_batch *batch) * cached translations. */ uint64_t base_addr = gen_aux_map_get_base(aux_map_ctx); - assert(base_addr != 0 && ALIGN(base_addr, 32 * 1024) == base_addr); + assert(base_addr != 0 && align64(base_addr, 32 * 1024) == base_addr); iris_load_register_imm64(batch, GENX(GFX_AUX_TABLE_BASE_ADDR_num), base_addr); batch->last_aux_map_state = aux_map_state_num; diff --git a/src/intel/common/gen_aux_map.c b/src/intel/common/gen_aux_map.c index 398f02416db..eb9dda8707b 100644 --- a/src/intel/common/gen_aux_map.c +++ b/src/intel/common/gen_aux_map.c @@ -151,7 +151,7 @@ align_and_verify_space(struct gen_aux_map_context *ctx, uint32_t size, struct aux_map_buffer *tail = list_last_entry(&ctx->buffers, struct aux_map_buffer, link); uint64_t gpu = tail->buffer->gpu + ctx->tail_offset; - uint64_t aligned = ALIGN(gpu, align); + uint64_t aligned = align64(gpu, align); if ((aligned - gpu) + size > ctx->tail_remaining) { return false; @@ -464,8 +464,8 @@ gen_aux_map_add_image(struct gen_aux_map_context *ctx, pthread_mutex_lock(&ctx->mutex); uint64_t map_addr = address; uint64_t dest_aux_addr = aux_address; - assert(ALIGN(address, 64 * 1024) == address); - assert(ALIGN(aux_address, 4 * 64) == aux_address); + assert(align64(address, 64 * 1024) == address); + assert(align64(aux_address, 4 * 64) == aux_address); while (map_addr - address < isl_surf->size_B) { add_mapping(ctx, map_addr, dest_aux_addr, isl_surf, &state_changed); map_addr += 64 * 1024; @@ -540,7 +540,7 @@ gen_aux_map_unmap_range(struct gen_aux_map_context *ctx, uint64_t address, address + size); uint64_t map_addr = address; - assert(ALIGN(address, 64 * 1024) == address); + assert(align64(address, 64 * 1024) == address); while (map_addr - address < size) { remove_mapping(ctx, map_addr, &state_changed); map_addr += 64 * 1024; |