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authorDave Airlie <[email protected]>2016-11-28 00:42:56 +0000
committerDave Airlie <[email protected]>2016-12-07 23:25:28 +0000
commit85118a1e4d27cdb7a3c5b958f325954c7166a647 (patch)
treeb0fb1deb1e3057b45caf2c6ebfb7c1088f9d0c16 /src
parenta5d10844eef71095cea3c1a921108c3bccc8ba01 (diff)
radv: move descriptor set userdata emission to draw flush time.
This is another step towards having the compiler decide the user sgpr layout. This still emits the descriptors sets for all shader types, but we will fix this later. Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
Diffstat (limited to 'src')
-rw-r--r--src/amd/vulkan/radv_cmd_buffer.c24
-rw-r--r--src/amd/vulkan/radv_private.h1
2 files changed, 23 insertions, 2 deletions
diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c
index 4ac5ad78c13..008164b50a4 100644
--- a/src/amd/vulkan/radv_cmd_buffer.c
+++ b/src/amd/vulkan/radv_cmd_buffer.c
@@ -916,6 +916,25 @@ radv_emit_descriptor_set_userdata(struct radv_cmd_buffer *cmd_buffer,
}
static void
+radv_flush_descriptors(struct radv_cmd_buffer *cmd_buffer)
+{
+ unsigned i;
+ if (!cmd_buffer->state.descriptors_dirty)
+ return;
+
+ for (i = 0; i < MAX_SETS; i++) {
+ if (!(cmd_buffer->state.descriptors_dirty & (1 << i)))
+ continue;
+ struct radv_descriptor_set *set = cmd_buffer->state.descriptors[i];
+ if (!set)
+ continue;
+
+ radv_emit_descriptor_set_userdata(cmd_buffer, set, i);
+ }
+ cmd_buffer->state.descriptors_dirty = 0;
+}
+
+static void
radv_flush_constants(struct radv_cmd_buffer *cmd_buffer,
struct radv_pipeline *pipeline,
VkShaderStageFlags stages)
@@ -1049,6 +1068,7 @@ radv_cmd_buffer_flush_state(struct radv_cmd_buffer *cmd_buffer)
radv_cmd_buffer_flush_dynamic_state(cmd_buffer);
+ radv_flush_descriptors(cmd_buffer);
radv_flush_constants(cmd_buffer, cmd_buffer->state.pipeline,
VK_SHADER_STAGE_ALL_GRAPHICS);
@@ -1366,7 +1386,7 @@ void radv_bind_descriptor_set(struct radv_cmd_buffer *cmd_buffer,
struct radeon_winsys *ws = cmd_buffer->device->ws;
cmd_buffer->state.descriptors[idx] = set;
-
+ cmd_buffer->state.descriptors_dirty |= (1 << idx);
if (!set)
return;
@@ -1374,7 +1394,6 @@ void radv_bind_descriptor_set(struct radv_cmd_buffer *cmd_buffer,
if (set->descriptors[j])
ws->cs_add_buffer(cmd_buffer->cs, set->descriptors[j], 7);
- radv_emit_descriptor_set_userdata(cmd_buffer, set, idx);
if(set->bo)
ws->cs_add_buffer(cmd_buffer->cs, set->bo, 8);
}
@@ -2014,6 +2033,7 @@ static void
radv_flush_compute_state(struct radv_cmd_buffer *cmd_buffer)
{
radv_emit_compute_pipeline(cmd_buffer);
+ radv_flush_descriptors(cmd_buffer);
radv_flush_constants(cmd_buffer, cmd_buffer->state.compute_pipeline,
VK_SHADER_STAGE_COMPUTE_BIT);
si_emit_cache_flush(cmd_buffer);
diff --git a/src/amd/vulkan/radv_private.h b/src/amd/vulkan/radv_private.h
index 4b720175c7b..c50e4016222 100644
--- a/src/amd/vulkan/radv_private.h
+++ b/src/amd/vulkan/radv_private.h
@@ -649,6 +649,7 @@ struct radv_cmd_state {
enum radv_cmd_flush_bits flush_bits;
unsigned active_occlusion_queries;
float offset_scale;
+ uint32_t descriptors_dirty;
};
struct radv_cmd_pool {
VkAllocationCallbacks alloc;