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authorKristian H. Kristensen <[email protected]>2019-06-04 13:38:33 -0700
committerKristian H. Kristensen <[email protected]>2019-06-05 11:15:04 -0700
commit6fffc091e2681bdc45c3762f3dce6bdc4c86c9f7 (patch)
tree819f1b075b1712a5afabb147b37a11cac445dccc /src
parentcea39af2fbf109e85a50263fe2ea50f7d568b31a (diff)
freedreno/a6xx: Remove dead code from a5xx
Reviewed-by: Rob Clark <[email protected]>
Diffstat (limited to 'src')
-rw-r--r--src/gallium/drivers/freedreno/a6xx/fd6_program.c10
1 files changed, 0 insertions, 10 deletions
diff --git a/src/gallium/drivers/freedreno/a6xx/fd6_program.c b/src/gallium/drivers/freedreno/a6xx/fd6_program.c
index e56425e6d2c..c3345dc1636 100644
--- a/src/gallium/drivers/freedreno/a6xx/fd6_program.c
+++ b/src/gallium/drivers/freedreno/a6xx/fd6_program.c
@@ -507,11 +507,6 @@ setup_stateobj(struct fd_ringbuffer *ring, struct fd6_program_state *state,
if (s[VS].instrlen)
fd6_emit_shader(ring, s[VS].v);
- // TODO depending on other bits in this reg (if any) set somewhere else?
-#if 0
- OUT_PKT4(ring, REG_A6XX_PC_PRIM_VTX_CNTL, 1);
- OUT_RING(ring, COND(s[VS].v->writes_psize, A6XX_PC_PRIM_VTX_CNTL_PSIZE));
-#endif
OUT_PKT4(ring, REG_A6XX_SP_PRIMITIVE_CNTL, 1);
OUT_RING(ring, A6XX_SP_PRIMITIVE_CNTL_VSOUT(l.cnt));
@@ -573,11 +568,6 @@ setup_stateobj(struct fd_ringbuffer *ring, struct fd6_program_state *state,
OUT_PKT4(ring, REG_A6XX_VPC_GS_SIV_CNTL, 1);
OUT_RING(ring, 0x0000ffff); /* XXX */
-#if 0
- OUT_PKT4(ring, REG_A6XX_SP_SP_CNTL, 1);
- OUT_RING(ring, 0x00000010); /* XXX */
-#endif
-
OUT_PKT4(ring, REG_A6XX_GRAS_CNTL, 1);
OUT_RING(ring,
CONDREG(ij_pix_regid, A6XX_GRAS_CNTL_VARYING) |