diff options
author | Brian <[email protected]> | 2008-01-11 08:14:42 -0700 |
---|---|---|
committer | Brian <[email protected]> | 2008-01-11 08:14:42 -0700 |
commit | 1217d5cca3503103cc40221ea8287960236e3734 (patch) | |
tree | fe5abcf95686714b0cb3fda7a02d459659c731b8 /src | |
parent | 299dffce4fafa2ed03a6e1f7ca7a5357c147477e (diff) |
Cell: Remove the pre-vbuf rendering code
Diffstat (limited to 'src')
-rw-r--r-- | src/mesa/pipe/cell/common.h | 13 | ||||
-rw-r--r-- | src/mesa/pipe/cell/ppu/Makefile | 1 | ||||
-rw-r--r-- | src/mesa/pipe/cell/ppu/cell_context.c | 8 | ||||
-rw-r--r-- | src/mesa/pipe/cell/ppu/cell_vbuf.c | 4 | ||||
-rw-r--r-- | src/mesa/pipe/cell/spu/main.c | 104 |
5 files changed, 9 insertions, 121 deletions
diff --git a/src/mesa/pipe/cell/common.h b/src/mesa/pipe/cell/common.h index dc2db299c48..60abe2d9bcf 100644 --- a/src/mesa/pipe/cell/common.h +++ b/src/mesa/pipe/cell/common.h @@ -52,7 +52,6 @@ #define CELL_CMD_CLEAR_SURFACE 3 #define CELL_CMD_FINISH 4 #define CELL_CMD_RENDER 5 -#define CELL_CMD_RENDER_VBUF 6 /** @@ -76,18 +75,9 @@ struct cell_command_clear_surface } ALIGN16_ATTRIB; -struct cell_command_render -{ - uint prim_type; - uint num_verts, num_attribs; - float xmin, ymin, xmax, ymax; - void *vertex_data; -} ALIGN16_ATTRIB; - - #define CELL_MAX_VBUF_SIZE (16 * 1024) #define CELL_MAX_VBUF_INDEXES 1024 -struct cell_command_render_vbuf +struct cell_command_render { uint prim_type; uint num_verts, num_attribs; @@ -104,7 +94,6 @@ struct cell_command struct cell_command_framebuffer fb; struct cell_command_clear_surface clear; struct cell_command_render render; - struct cell_command_render_vbuf render_vbuf; } ALIGN16_ATTRIB; diff --git a/src/mesa/pipe/cell/ppu/Makefile b/src/mesa/pipe/cell/ppu/Makefile index 9bf89702d5b..44f14c0211c 100644 --- a/src/mesa/pipe/cell/ppu/Makefile +++ b/src/mesa/pipe/cell/ppu/Makefile @@ -19,7 +19,6 @@ SOURCES = \ cell_context.c \ cell_draw_arrays.c \ cell_flush.c \ - cell_render.c \ cell_state_blend.c \ cell_state_clip.c \ cell_state_derived.c \ diff --git a/src/mesa/pipe/cell/ppu/cell_context.c b/src/mesa/pipe/cell/ppu/cell_context.c index 52c97c939b9..defce2869a5 100644 --- a/src/mesa/pipe/cell/ppu/cell_context.c +++ b/src/mesa/pipe/cell/ppu/cell_context.c @@ -237,14 +237,8 @@ cell_create_context(struct pipe_winsys *winsys, struct cell_winsys *cws) cell->draw = draw_create(); -#define VBUF 1 -#if VBUF cell_init_vbuf(cell); draw_set_rasterize_stage(cell->draw, cell->vbuf); -#else - cell->render_stage = cell_draw_render_stage(cell); - draw_set_rasterize_stage(cell->draw, cell->render_stage); -#endif cell->prim_buffer.xmin = 1e100; cell->prim_buffer.ymin = 1e100; @@ -254,7 +248,7 @@ cell_create_context(struct pipe_winsys *winsys, struct cell_winsys *cws) /* * SPU stuff */ - cell->num_spus = 6; /* XXX >6 seems to fail */ + cell->num_spus = 6; cell_start_spus(cell->num_spus); diff --git a/src/mesa/pipe/cell/ppu/cell_vbuf.c b/src/mesa/pipe/cell/ppu/cell_vbuf.c index 62d453cb7f2..1d9a57ce441 100644 --- a/src/mesa/pipe/cell/ppu/cell_vbuf.c +++ b/src/mesa/pipe/cell/ppu/cell_vbuf.c @@ -119,7 +119,7 @@ cell_vbuf_draw(struct vbuf_render *vbr, return; /* only render tris for now */ for (i = 0; i < cell->num_spus; i++) { - struct cell_command_render_vbuf *render = &cell_global.command[i].render_vbuf; + struct cell_command_render *render = &cell_global.command[i].render; render->prim_type = prim; render->num_verts = nr_vertices; render->num_attribs = CELL_MAX_ATTRIBS; /* XXX fix */ @@ -133,7 +133,7 @@ cell_vbuf_draw(struct vbuf_render *vbr, ASSERT_ALIGN16(render->vertex_data); ASSERT_ALIGN16(render->index_data); - send_mbox_message(cell_global.spe_contexts[i], CELL_CMD_RENDER_VBUF); + send_mbox_message(cell_global.spe_contexts[i], CELL_CMD_RENDER); } cell_flush(&cell->pipe, 0x0); diff --git a/src/mesa/pipe/cell/spu/main.c b/src/mesa/pipe/cell/spu/main.c index 548ef127ba2..20f15029e14 100644 --- a/src/mesa/pipe/cell/spu/main.c +++ b/src/mesa/pipe/cell/spu/main.c @@ -208,94 +208,6 @@ tile_bounding_box(const struct cell_command_render *render, static void render(const struct cell_command_render *render) { - struct cell_prim_buffer prim_buffer ALIGN16_ATTRIB; - uint i, j, vertex_bytes; - - /* - printf("SPU %u: RENDER buffer dst=%p src=%p size=%d\n", - init.id, - &prim_buffer, render->vertex_data, (int)sizeof(prim_buffer)); - */ - - ASSERT_ALIGN16(render->vertex_data); - ASSERT_ALIGN16(&prim_buffer); - - /* how much vertex data */ - vertex_bytes = render->num_verts * render->num_attribs * 4 * sizeof(float); - - /* get vertex data from main memory */ - mfc_get(&prim_buffer, /* dest */ - (unsigned int) render->vertex_data, /* src */ - vertex_bytes, /* size */ - TAG_VERTEX_BUFFER, - 0, /* tid */ - 0 /* rid */); - wait_on_mask(1 << TAG_VERTEX_BUFFER); - - /* find tiles which intersect the prim bounding box */ - uint txmin, tymin, box_width_tiles, box_num_tiles; - tile_bounding_box(render, &txmin, &tymin, - &box_num_tiles, &box_width_tiles); - - /* make sure any pending clears have completed */ - wait_on_mask(1 << TAG_SURFACE_CLEAR); - - /* loop over tiles */ - for (i = init.id; i < box_num_tiles; i += init.num_spus) { - const uint tx = txmin + i % box_width_tiles; - const uint ty = tymin + i / box_width_tiles; - - ASSERT(tx < fb.width_tiles); - ASSERT(ty < fb.height_tiles); - - /* Start fetching color/z tiles. We'll wait for completion when - * we need read/write to them later in triangle rasterization. - */ - if (fb.depth_format == PIPE_FORMAT_Z16_UNORM) { - if (tile_status_z[ty][tx] != TILE_STATUS_CLEAR) { - get_tile(&fb, tx, ty, (uint *) ztile, TAG_READ_TILE_Z, 1); - } - } - - if (tile_status[ty][tx] != TILE_STATUS_CLEAR) { - get_tile(&fb, tx, ty, (uint *) ctile, TAG_READ_TILE_COLOR, 0); - } - - ASSERT(render->prim_type == PIPE_PRIM_TRIANGLES); - - /* loop over tris */ - for (j = 0; j < render->num_verts; j += 3) { - const float *v0 = (const float *) prim_buffer.vertex[j+0]; - const float *v1 = (const float *) prim_buffer.vertex[j+1]; - const float *v2 = (const float *) prim_buffer.vertex[j+2]; - - tri_draw(v0, v1, v2, tx, ty); - } - - /* write color/z tiles back to main framebuffer, if dirtied */ - if (tile_status[ty][tx] == TILE_STATUS_DIRTY) { - put_tile(&fb, tx, ty, (uint *) ctile, TAG_WRITE_TILE_COLOR, 0); - tile_status[ty][tx] = TILE_STATUS_DEFINED; - } - if (fb.depth_format == PIPE_FORMAT_Z16_UNORM) { - if (tile_status_z[ty][tx] == TILE_STATUS_DIRTY) { - put_tile(&fb, tx, ty, (uint *) ztile, TAG_WRITE_TILE_Z, 1); - tile_status_z[ty][tx] = TILE_STATUS_DEFINED; - } - } - - /* XXX move these... */ - wait_on_mask(1 << TAG_WRITE_TILE_COLOR); - if (fb.depth_format == PIPE_FORMAT_Z16_UNORM) { - wait_on_mask(1 << TAG_WRITE_TILE_Z); - } - } -} - - -static void -render_vbuf(const struct cell_command_render_vbuf *render) -{ /* we'll DMA into these buffers */ ubyte vertex_data[CELL_MAX_VBUF_SIZE] ALIGN16_ATTRIB; ushort indexes[CELL_MAX_VBUF_INDEXES] ALIGN16_ATTRIB; @@ -483,18 +395,12 @@ main_loop(void) break; case CELL_CMD_RENDER: if (Debug) - printf("SPU %u: RENDER %u verts, prim %u\n", - init.id, cmd.render.num_verts, cmd.render.prim_type); - render(&cmd.render); - break; - case CELL_CMD_RENDER_VBUF: - if (Debug) - printf("SPU %u: RENDER_VBUF prim %u, indices: %u, nr_vert: %u\n", + printf("SPU %u: RENDER prim %u, indices: %u, nr_vert: %u\n", init.id, - cmd.render_vbuf.prim_type, - cmd.render_vbuf.num_verts, - cmd.render_vbuf.num_indexes); - render_vbuf(&cmd.render_vbuf); + cmd.render.prim_type, + cmd.render.num_verts, + cmd.render.num_indexes); + render(&cmd.render); break; case CELL_CMD_FINISH: |