diff options
| author | Rafael Antognolli <[email protected]> | 2018-03-13 16:58:21 -0700 |
|---|---|---|
| committer | Rafael Antognolli <[email protected]> | 2018-03-16 09:27:16 -0700 |
| commit | f89e735719a63d674f12a892341ce86e10d82d82 (patch) | |
| tree | 221ba6024b9a86ef422620046bee6e3a7afe8768 /src | |
| parent | 315ee5faecf3c3d2a435485ce9ee8523759b5da9 (diff) | |
intel/compiler: Check for unsupported register sizes.
Make sure we don't emit 64 bit types if the hardware doesn't support
them.
Signed-off-by: Rafael Antognolli <[email protected]>
Suggested-by: Kenneth Graunke <[email protected]>
Reviewed-by: Matt Turner <[email protected]>
Diffstat (limited to 'src')
| -rw-r--r-- | src/intel/compiler/brw_reg_type.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/src/intel/compiler/brw_reg_type.c b/src/intel/compiler/brw_reg_type.c index 704d6c9e1d9..60240ba1513 100644 --- a/src/intel/compiler/brw_reg_type.c +++ b/src/intel/compiler/brw_reg_type.c @@ -204,6 +204,9 @@ brw_reg_type_to_hw_type(const struct gen_device_info *devinfo, table = gen4_hw_type; } + assert(devinfo->has_64bit_types || brw_reg_type_to_size(type) < 8 || + type == BRW_REGISTER_TYPE_NF); + if (file == BRW_IMMEDIATE_VALUE) { assert(table[type].imm_type != (enum hw_imm_type)INVALID); return table[type].imm_type; |