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authorKenneth Graunke <[email protected]>2018-02-28 13:22:22 -0800
committerKenneth Graunke <[email protected]>2018-02-28 15:03:51 -0800
commite51b0664e03a028961e1a4250c49fbc3005b2fa4 (patch)
treec9a4e642a9177c54306dd3339edeee2315809d25 /src
parente4e79a02da2e813284aa8a82dfd4423f0ae9923a (diff)
i965: Don't emit MOVs with undefined registers for Gen4 point clipping.
Gen4 point clipping calls brw_clip_tri_alloc_regs with nr_verts == 0, which means that c->reg.vertex[] isn't initialized. It then emits MOVs to stomp components of those uninitialized registers to 0. This started causing assertions after Matt's recent series, when those uninitialized registers started getting BRW_REGISTER_TYPE_NF, which definitely doesn't exist on Gen4-5. Reviewed-by: Matt Turner <[email protected]>
Diffstat (limited to 'src')
-rw-r--r--src/intel/compiler/brw_clip_tri.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/intel/compiler/brw_clip_tri.c b/src/intel/compiler/brw_clip_tri.c
index 8ccf9e49b20..194e6ab1d26 100644
--- a/src/intel/compiler/brw_clip_tri.c
+++ b/src/intel/compiler/brw_clip_tri.c
@@ -68,7 +68,7 @@ void brw_clip_tri_alloc_regs( struct brw_clip_compile *c,
i += c->nr_regs;
}
- if (c->vue_map.num_slots % 2) {
+ if (c->vue_map.num_slots % 2 && nr_verts > 0) {
/* The VUE has an odd number of slots so the last register is only half
* used. Fill the second half with zero.
*/