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authorChristian König <[email protected]>2013-07-08 08:32:04 -0600
committerChristian König <[email protected]>2014-02-13 11:11:24 +0100
commitcbdd052577e798e0cd7b39eb75cfebee406f8410 (patch)
tree00771dba9a8ec5d8e4e37b833dce38716433e779 /src
parentef9a6ded10d17e42b36a1382d71fd6d547121ee7 (diff)
radeon/winsys: add VCE support v4
v2: add fw version query v3: add README.VCE v4: avoid error msg when kernel doesn't support it Signed-off-by: Christian König <[email protected]>
Diffstat (limited to 'src')
-rw-r--r--src/gallium/winsys/radeon/drm/radeon_drm_cs.c10
-rw-r--r--src/gallium/winsys/radeon/drm/radeon_drm_winsys.c20
-rw-r--r--src/gallium/winsys/radeon/drm/radeon_winsys.h2
3 files changed, 31 insertions, 1 deletions
diff --git a/src/gallium/winsys/radeon/drm/radeon_drm_cs.c b/src/gallium/winsys/radeon/drm/radeon_drm_cs.c
index d8ad2972958..ccba0c0b791 100644
--- a/src/gallium/winsys/radeon/drm/radeon_drm_cs.c
+++ b/src/gallium/winsys/radeon/drm/radeon_drm_cs.c
@@ -99,6 +99,10 @@
#define RADEON_CS_RING_UVD 3
#endif
+#ifndef RADEON_CS_RING_VCE
+#define RADEON_CS_RING_VCE 4
+#endif
+
#ifndef RADEON_CS_END_OF_FRAME
#define RADEON_CS_END_OF_FRAME 0x04
#endif
@@ -538,6 +542,12 @@ static void radeon_drm_cs_flush(struct radeon_winsys_cs *rcs, unsigned flags, ui
cs->cst->cs.num_chunks = 3;
break;
+ case RING_VCE:
+ cs->cst->flags[0] = 0;
+ cs->cst->flags[1] = RADEON_CS_RING_VCE;
+ cs->cst->cs.num_chunks = 3;
+ break;
+
default:
case RING_GFX:
cs->cst->flags[0] = 0;
diff --git a/src/gallium/winsys/radeon/drm/radeon_drm_winsys.c b/src/gallium/winsys/radeon/drm/radeon_drm_winsys.c
index 427ee7df642..c28f3a7b89e 100644
--- a/src/gallium/winsys/radeon/drm/radeon_drm_winsys.c
+++ b/src/gallium/winsys/radeon/drm/radeon_drm_winsys.c
@@ -97,10 +97,18 @@
#define RADEON_INFO_RING_WORKING 0x15
#endif
+#ifndef RADEON_INFO_VCE_FW_VERSION
+#define RADEON_INFO_VCE_FW_VERSION 0x1b
+#endif
+
#ifndef RADEON_CS_RING_UVD
#define RADEON_CS_RING_UVD 3
#endif
+#ifndef RADEON_CS_RING_VCE
+#define RADEON_CS_RING_VCE 4
+#endif
+
static struct util_hash_table *fd_tab = NULL;
/* Enable/disable feature access for one command stream.
@@ -341,13 +349,23 @@ static boolean do_winsys_init(struct radeon_drm_winsys *ws)
ws->info.r600_has_dma = TRUE;
}
- /* Check for UVD */
+ /* Check for UVD and VCE */
ws->info.has_uvd = FALSE;
+ ws->info.vce_fw_version = 0x00000000;
if (ws->info.drm_minor >= 32) {
uint32_t value = RADEON_CS_RING_UVD;
if (radeon_get_drm_value(ws->fd, RADEON_INFO_RING_WORKING,
"UVD Ring working", &value))
ws->info.has_uvd = value;
+
+ value = RADEON_CS_RING_VCE;
+ if (radeon_get_drm_value(ws->fd, RADEON_INFO_RING_WORKING,
+ NULL, &value) && value) {
+
+ if (radeon_get_drm_value(ws->fd, RADEON_INFO_VCE_FW_VERSION,
+ "VCE FW version", &value))
+ ws->info.vce_fw_version = value;
+ }
}
/* Get GEM info. */
diff --git a/src/gallium/winsys/radeon/drm/radeon_winsys.h b/src/gallium/winsys/radeon/drm/radeon_winsys.h
index 55f60d3f412..37affc3896d 100644
--- a/src/gallium/winsys/radeon/drm/radeon_winsys.h
+++ b/src/gallium/winsys/radeon/drm/radeon_winsys.h
@@ -149,6 +149,7 @@ enum ring_type {
RING_GFX = 0,
RING_DMA,
RING_UVD,
+ RING_VCE,
RING_LAST,
};
@@ -180,6 +181,7 @@ struct radeon_info {
uint32_t drm_patchlevel;
boolean has_uvd;
+ uint32_t vce_fw_version;
uint32_t r300_num_gb_pipes;
uint32_t r300_num_z_pipes;