diff options
author | Karol Herbst <[email protected]> | 2018-06-23 19:01:34 +0200 |
---|---|---|
committer | Karol Herbst <[email protected]> | 2018-08-04 18:25:20 +0200 |
commit | c3325097be93d6374a6b5f9fb5eee0878698ef77 (patch) | |
tree | b25e3c0b1ba2949dbd5f5d591284f5461f556e5b /src | |
parent | 0ca046d7e97564c0479cb8d42ba40c798c163bb5 (diff) |
nvc0/ir: return 0 in imageLoad on incomplete textures
We already guarded all OP_SULDP against out of bound accesses, but we
ended up just reusing whatever value was stored in the dest registers.
Fixes CTS test shader_image_load_store.incomplete_textures
v2: fix for loads not ending up with predicates (bindless_texture)
v3: fix replacing the def
Cc: <[email protected]>
Reviewed-by: Ilia Mirkin <[email protected]>
Signed-off-by: Karol Herbst <[email protected]>
Diffstat (limited to 'src')
-rw-r--r-- | src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp | 33 | ||||
-rw-r--r-- | src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.h | 1 |
2 files changed, 31 insertions, 3 deletions
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp index c47d10896ce..87ded68e5a7 100644 --- a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp +++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp @@ -2152,12 +2152,35 @@ NVC0LoweringPass::convertSurfaceFormat(TexInstruction *su) } void +NVC0LoweringPass::insertOOBSurfaceOpResult(TexInstruction *su) +{ + if (!su->getPredicate()) + return; + + bld.setPosition(su, true); + + for (unsigned i = 0; su->defExists(i); ++i) { + ValueDef &def = su->def(i); + + Instruction *mov = bld.mkMov(bld.getSSA(), bld.loadImm(NULL, 0)); + assert(su->cc == CC_NOT_P); + mov->setPredicate(CC_P, su->getPredicate()); + Instruction *uni = bld.mkOp2(OP_UNION, TYPE_U32, bld.getSSA(), NULL, mov->getDef(0)); + + def.replace(uni->getDef(0), false); + uni->setSrc(0, def.get()); + } +} + +void NVC0LoweringPass::handleSurfaceOpNVE4(TexInstruction *su) { processSurfaceCoordsNVE4(su); - if (su->op == OP_SULDP) + if (su->op == OP_SULDP) { convertSurfaceFormat(su); + insertOOBSurfaceOpResult(su); + } if (su->op == OP_SUREDB || su->op == OP_SUREDP) { assert(su->getPredicate()); @@ -2267,8 +2290,10 @@ NVC0LoweringPass::handleSurfaceOpNVC0(TexInstruction *su) processSurfaceCoordsNVC0(su); - if (su->op == OP_SULDP) + if (su->op == OP_SULDP) { convertSurfaceFormat(su); + insertOOBSurfaceOpResult(su); + } if (su->op == OP_SUREDB || su->op == OP_SUREDP) { const int dim = su->tex.target.getDim(); @@ -2370,8 +2395,10 @@ NVC0LoweringPass::handleSurfaceOpGM107(TexInstruction *su) { processSurfaceCoordsGM107(su); - if (su->op == OP_SULDP) + if (su->op == OP_SULDP) { convertSurfaceFormat(su); + insertOOBSurfaceOpResult(su); + } if (su->op == OP_SUREDP) { Value *def = su->getDef(0); diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.h b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.h index 8724c09afd9..5dbb3e4f009 100644 --- a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.h +++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.h @@ -172,6 +172,7 @@ private: void processSurfaceCoordsNVE4(TexInstruction *); void processSurfaceCoordsNVC0(TexInstruction *); void convertSurfaceFormat(TexInstruction *); + void insertOOBSurfaceOpResult(TexInstruction *); Value *calculateSampleOffset(Value *sampleID); protected: |