diff options
author | Sagar Ghuge <[email protected]> | 2019-02-13 22:22:16 -0800 |
---|---|---|
committer | Kenneth Graunke <[email protected]> | 2019-03-11 22:46:39 -0700 |
commit | bbef6c2d5ff56a6a319f5d022069b05db94c74a7 (patch) | |
tree | 8be7751ec5f0ffba1f315e3734973baa3f1c7d51 /src | |
parent | cb2898f4786f9e80e0a2dd061d620fc7ced6f1ea (diff) |
iris: Flag fewer dirty bits in BLORP
v2: 1) Skip flagging IRIS_DIRTY_DEPTH_BUFFER if
BLORP_BATCH_NO_EMIT_DEPTH_STENCIL is set (Kenneth Graunke)
2) Add missing flags (Kenneth Graunke)
Signed-off-by: Sagar Ghuge <[email protected]>
Reviewed-by: Kenneth Graunke <[email protected]>
Diffstat (limited to 'src')
-rw-r--r-- | src/gallium/drivers/iris/iris_blorp.c | 30 |
1 files changed, 27 insertions, 3 deletions
diff --git a/src/gallium/drivers/iris/iris_blorp.c b/src/gallium/drivers/iris/iris_blorp.c index a3df22c0a40..46ecd2b8531 100644 --- a/src/gallium/drivers/iris/iris_blorp.c +++ b/src/gallium/drivers/iris/iris_blorp.c @@ -316,11 +316,35 @@ iris_blorp_exec(struct blorp_batch *blorp_batch, /* We've smashed all state compared to what the normal 3D pipeline * rendering tracks for GL. */ - // XXX: skip some if (!(batch->flags & BLORP_BATCH_NO_EMIT_DEPTH_STENCIL)) - ice->state.dirty |= ~(IRIS_DIRTY_POLYGON_STIPPLE | + + uint64_t skip_bits = (IRIS_DIRTY_POLYGON_STIPPLE | IRIS_DIRTY_SO_BUFFERS | IRIS_DIRTY_SO_DECL_LIST | - IRIS_DIRTY_LINE_STIPPLE); + IRIS_DIRTY_LINE_STIPPLE | + IRIS_ALL_DIRTY_FOR_COMPUTE | + IRIS_DIRTY_SCISSOR_RECT | + IRIS_DIRTY_UNCOMPILED_VS | + IRIS_DIRTY_UNCOMPILED_TCS | + IRIS_DIRTY_UNCOMPILED_TES | + IRIS_DIRTY_UNCOMPILED_GS | + IRIS_DIRTY_UNCOMPILED_FS | + IRIS_DIRTY_VF | + IRIS_DIRTY_SF_CL_VIEWPORT | + IRIS_DIRTY_SAMPLER_STATES_VS | + IRIS_DIRTY_SAMPLER_STATES_TCS | + IRIS_DIRTY_SAMPLER_STATES_TES | + IRIS_DIRTY_SAMPLER_STATES_GS); + + /* we can skip flagging IRIS_DIRTY_DEPTH_BUFFER, if + * BLORP_BATCH_NO_EMIT_DEPTH_STENCIL is set. + */ + if (blorp_batch->flags & BLORP_BATCH_NO_EMIT_DEPTH_STENCIL) + skip_bits |= IRIS_DIRTY_DEPTH_BUFFER; + + if (!params->wm_prog_data) + skip_bits |= IRIS_DIRTY_BLEND_STATE | IRIS_DIRTY_PS_BLEND; + + ice->state.dirty |= ~skip_bits; if (params->dst.enabled) { iris_render_cache_add_bo(batch, params->dst.addr.buffer, |