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authorKenneth Graunke <[email protected]>2018-09-17 21:15:48 -0700
committerKenneth Graunke <[email protected]>2019-02-21 10:26:08 -0800
commitaf9fe0d472f2fa5dbe0d6c44e5452648d8c94194 (patch)
tree8321244c6ce9588f3cce4afbd682a68ff8c7b430 /src
parent30c370ed4bc502b6163b52b36c6bb1c776ccd1f1 (diff)
iris: rw_bo for pipe controls
this is used for WRITE IMMEDIATE... but maybe we don't want to for the workaround BO?
Diffstat (limited to 'src')
-rw-r--r--src/gallium/drivers/iris/iris_state.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/gallium/drivers/iris/iris_state.c b/src/gallium/drivers/iris/iris_state.c
index 0485a8aa2fd..57b43876962 100644
--- a/src/gallium/drivers/iris/iris_state.c
+++ b/src/gallium/drivers/iris/iris_state.c
@@ -4436,7 +4436,7 @@ iris_emit_raw_pipe_control(struct iris_batch *batch, uint32_t flags,
flags & PIPE_CONTROL_INDIRECT_STATE_POINTERS_DISABLE;
pc.TextureCacheInvalidationEnable =
flags & PIPE_CONTROL_TEXTURE_CACHE_INVALIDATE;
- pc.Address = ro_bo(bo, offset);
+ pc.Address = rw_bo(bo, offset);
pc.ImmediateData = imm;
}
}