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authorAnuj Phogat <[email protected]>2018-09-07 14:40:12 -0700
committerAnuj Phogat <[email protected]>2019-03-27 19:34:48 +0000
commita583f86305875957931fccfa7c4176d07b192fe2 (patch)
treef0cf7b4c0103f5d209f6e27a4c75dda46be2e931 /src
parentf8ef8b56a6d2f40772678eabd5d20f14081ad23b (diff)
intel: Add Elkhart Lake device info
V2: Fix L3 bank count (Vivek) Fix simulator_id and num_eu_per_subslice (Lionel) Signed-off-by: Anuj Phogat <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]>
Diffstat (limited to 'src')
-rw-r--r--src/intel/dev/gen_device_info.c60
1 files changed, 60 insertions, 0 deletions
diff --git a/src/intel/dev/gen_device_info.c b/src/intel/dev/gen_device_info.c
index 7c9b986f064..4837bda47aa 100644
--- a/src/intel/dev/gen_device_info.c
+++ b/src/intel/dev/gen_device_info.c
@@ -934,6 +934,66 @@ static const struct gen_device_info gen_device_info_icl_1x8 = {
.simulator_id = 19,
};
+static const struct gen_device_info gen_device_info_ehl_4x8 = {
+ GEN11_FEATURES(1, 1, subslices(4), 4),
+ .urb = {
+ .size = 512,
+ .min_entries = {
+ [MESA_SHADER_VERTEX] = 64,
+ [MESA_SHADER_TESS_EVAL] = 34,
+ },
+ .max_entries = {
+ [MESA_SHADER_VERTEX] = 2384,
+ [MESA_SHADER_TESS_CTRL] = 1032,
+ [MESA_SHADER_TESS_EVAL] = 2384,
+ [MESA_SHADER_GEOMETRY] = 1032,
+ },
+ },
+ .simulator_id = 28,
+};
+
+/* FIXME: Verfiy below entries when more information is available for this SKU.
+ */
+static const struct gen_device_info gen_device_info_ehl_4x4 = {
+ GEN11_FEATURES(1, 1, subslices(4), 4),
+ .urb = {
+ .size = 512,
+ .min_entries = {
+ [MESA_SHADER_VERTEX] = 64,
+ [MESA_SHADER_TESS_EVAL] = 34,
+ },
+ .max_entries = {
+ [MESA_SHADER_VERTEX] = 2384,
+ [MESA_SHADER_TESS_CTRL] = 1032,
+ [MESA_SHADER_TESS_EVAL] = 2384,
+ [MESA_SHADER_GEOMETRY] = 1032,
+ },
+ },
+ .num_eu_per_subslice = 4,
+ .simulator_id = 28,
+};
+
+/* FIXME: Verfiy below entries when more information is available for this SKU.
+ */
+static const struct gen_device_info gen_device_info_ehl_2x4 = {
+ GEN11_FEATURES(1, 1, subslices(2), 4),
+ .urb = {
+ .size = 512,
+ .min_entries = {
+ [MESA_SHADER_VERTEX] = 64,
+ [MESA_SHADER_TESS_EVAL] = 34,
+ },
+ .max_entries = {
+ [MESA_SHADER_VERTEX] = 2384,
+ [MESA_SHADER_TESS_CTRL] = 1032,
+ [MESA_SHADER_TESS_EVAL] = 2384,
+ [MESA_SHADER_GEOMETRY] = 1032,
+ },
+ },
+ .num_eu_per_subslice =4,
+ .simulator_id = 28,
+};
+
static void
gen_device_info_set_eu_mask(struct gen_device_info *devinfo,
unsigned slice,