summaryrefslogtreecommitdiffstats
path: root/src
diff options
context:
space:
mode:
authorIan Romanick <[email protected]>2008-03-17 16:09:28 -0700
committerIan Romanick <[email protected]>2008-03-17 16:09:28 -0700
commit9f93e6701902312edf48821bb4c0558c3d62aaa3 (patch)
treea898dee863a579b1559c3d986b9eaa6e8249630f /src
parent9f106a8683ec89b873f0237fbb6930a63b89dfa0 (diff)
cell: Don't segfault when unbinding alpha / stencil / depth test state
Diffstat (limited to 'src')
-rw-r--r--src/gallium/drivers/cell/ppu/cell_pipe_state.c2
-rw-r--r--src/gallium/drivers/cell/ppu/cell_state_emit.c17
-rw-r--r--src/gallium/drivers/cell/spu/spu_main.c23
3 files changed, 29 insertions, 13 deletions
diff --git a/src/gallium/drivers/cell/ppu/cell_pipe_state.c b/src/gallium/drivers/cell/ppu/cell_pipe_state.c
index 66ede99d13b..c880760e4bd 100644
--- a/src/gallium/drivers/cell/ppu/cell_pipe_state.c
+++ b/src/gallium/drivers/cell/ppu/cell_pipe_state.c
@@ -116,7 +116,7 @@ cell_bind_depth_stencil_alpha_state(struct pipe_context *pipe,
draw_flush(cell->draw);
- if (cdsa->code.store == NULL) {
+ if ((cdsa != NULL) && (cdsa->code.store == NULL)) {
cell_generate_depth_stencil_test(cdsa);
}
diff --git a/src/gallium/drivers/cell/ppu/cell_state_emit.c b/src/gallium/drivers/cell/ppu/cell_state_emit.c
index c8d5fdf709b..e2cc9de48ad 100644
--- a/src/gallium/drivers/cell/ppu/cell_state_emit.c
+++ b/src/gallium/drivers/cell/ppu/cell_state_emit.c
@@ -74,11 +74,18 @@ cell_emit_state(struct cell_context *cell)
struct cell_command_depth_stencil_alpha_test dsat;
- dsat.base = (intptr_t) cell->depth_stencil->code.store;
- dsat.size = (char *) cell->depth_stencil->code.csr
- - (char *) cell->depth_stencil->code.store;
- dsat.read_depth = TRUE;
- dsat.read_stencil = FALSE;
+ if (cell->depth_stencil != NULL) {
+ dsat.base = (intptr_t) cell->depth_stencil->code.store;
+ dsat.size = (char *) cell->depth_stencil->code.csr
+ - (char *) cell->depth_stencil->code.store;
+ dsat.read_depth = TRUE;
+ dsat.read_stencil = FALSE;
+ } else {
+ dsat.base = 0;
+ dsat.size = 0;
+ dsat.read_depth = FALSE;
+ dsat.read_stencil = FALSE;
+ }
{
uint32_t *p = cell->depth_stencil->code.store;
diff --git a/src/gallium/drivers/cell/spu/spu_main.c b/src/gallium/drivers/cell/spu/spu_main.c
index 8e46f6e4719..b8bb8e9449b 100644
--- a/src/gallium/drivers/cell/spu/spu_main.c
+++ b/src/gallium/drivers/cell/spu/spu_main.c
@@ -260,13 +260,22 @@ cmd_state_depth_stencil(const struct cell_command_depth_stencil_alpha_test *stat
ASSERT_ALIGN16(state->base);
- mfc_get(depth_stencil_code_buffer,
- (unsigned int) state->base, /* src */
- ROUNDUP16(state->size),
- TAG_BATCH_BUFFER,
- 0, /* tid */
- 0 /* rid */);
- wait_on_mask(1 << TAG_BATCH_BUFFER);
+ if (state->size != 0) {
+ mfc_get(depth_stencil_code_buffer,
+ (unsigned int) state->base, /* src */
+ ROUNDUP16(state->size),
+ TAG_BATCH_BUFFER,
+ 0, /* tid */
+ 0 /* rid */);
+ wait_on_mask(1 << TAG_BATCH_BUFFER);
+ } else {
+ /* If there is no code, emit a return instruction.
+ */
+ depth_stencil_code_buffer[0] = 0x35;
+ depth_stencil_code_buffer[1] = 0x00;
+ depth_stencil_code_buffer[2] = 0x00;
+ depth_stencil_code_buffer[3] = 0x00;
+ }
spu.frag_test = (frag_test_func) depth_stencil_code_buffer;
spu.read_depth = state->read_depth;