diff options
| author | Dave Airlie <[email protected]> | 2018-04-30 12:45:14 +1000 |
|---|---|---|
| committer | Dave Airlie <[email protected]> | 2018-05-01 05:58:14 +1000 |
| commit | 8d3529872c940c263fb879e1cd358965dcce3a90 (patch) | |
| tree | 48daa6cdd76339c6f6aa29f52660a7e3d04a8de8 /src | |
| parent | bde12f75e1de264319a8102710cc8fe306d44ef8 (diff) | |
ac/nir: expand 64-bit vec3 loads to fix shuffling.
If loading 64-bit vec3 values, a 4 component load would be followed
by a 2 component load and the resulting shuffle would fail as it
requires 2 4 components. This just expands the second results
vector out to 4 components.
This fixes 100 CTS tests:
dEQP-VK.spirv_assembly.type.vec3.*64*
Reviewed-by: Bas Nieuwenhuizen <[email protected]>
Diffstat (limited to 'src')
| -rw-r--r-- | src/amd/common/ac_nir_to_llvm.c | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c index e4ae6ef49ad..b77d62a39b0 100644 --- a/src/amd/common/ac_nir_to_llvm.c +++ b/src/amd/common/ac_nir_to_llvm.c @@ -1572,6 +1572,11 @@ static LLVMValueRef visit_load_buffer(struct ac_nir_context *ctx, LLVMConstInt(ctx->ac.i32, 6, false), LLVMConstInt(ctx->ac.i32, 7, false) }; + if (num_components == 6) { + /* we end up with a v4f32 and v2f32 but shuffle fails on that */ + results[1] = ac_build_expand_to_vec4(&ctx->ac, results[1], 4); + } + LLVMValueRef swizzle = LLVMConstVector(masks, num_components); ret = LLVMBuildShuffleVector(ctx->ac.builder, results[0], results[num_components > 4 ? 1 : 0], swizzle, ""); |