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authorMatt Turner <[email protected]>2014-06-29 18:02:49 -0700
committerMatt Turner <[email protected]>2014-07-05 22:42:30 -0700
commit857c06236cf8086566f05e627856dcf8421e2292 (patch)
tree986e11a4a46307778f7667e58462a785ccc7b834 /src
parentce706b4a9bd53fbe274687025965333541a0e70d (diff)
i965: Repack backend_instruction struct.
Reviewed-by: Topi Pohjolainen <[email protected]>
Diffstat (limited to 'src')
-rw-r--r--src/mesa/drivers/dri/i965/brw_shader.h12
1 files changed, 5 insertions, 7 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_shader.h b/src/mesa/drivers/dri/i965/brw_shader.h
index 3205b672e79..558d05268e5 100644
--- a/src/mesa/drivers/dri/i965/brw_shader.h
+++ b/src/mesa/drivers/dri/i965/brw_shader.h
@@ -99,12 +99,6 @@ public:
*/
bool has_side_effects() const;
- enum opcode opcode; /* BRW_OPCODE_* or FS_OPCODE_* */
-
- enum brw_predicate predicate;
- bool predicate_inverse;
- bool writes_accumulator; /**< instruction implicitly writes accumulator */
-
/** @{
* Annotation for the generated IR. One of the two can be set.
*/
@@ -118,8 +112,12 @@ public:
uint8_t mlen; /**< SEND message length */
int8_t base_mrf; /**< First MRF in the SEND message, if mlen is nonzero. */
uint8_t target; /**< MRT target. */
- enum brw_conditional_mod conditional_mod; /**< BRW_CONDITIONAL_* */
+ enum opcode opcode; /* BRW_OPCODE_* or FS_OPCODE_* */
+ enum brw_conditional_mod conditional_mod; /**< BRW_CONDITIONAL_* */
+ enum brw_predicate predicate;
+ bool predicate_inverse:1;
+ bool writes_accumulator:1; /**< instruction implicitly writes accumulator */
bool force_writemask_all:1;
bool no_dd_clear:1;
bool no_dd_check:1;