diff options
author | Samuel Pitoiset <[email protected]> | 2017-09-05 15:34:07 +0200 |
---|---|---|
committer | Samuel Pitoiset <[email protected]> | 2017-09-14 10:37:57 +0200 |
commit | 80b8d9f7e7b41cb07a4d4727035ed7ec4ca468cc (patch) | |
tree | 2c6799c17b6b13261b027afedabdba4ae83ff061 /src | |
parent | d28cbf6f9efa17c762375b91130c73c6cf3db2db (diff) |
radv: add radv_shader_dump_stats() helper
To dump the shader stats when a hang is detected.
Signed-off-by: Samuel Pitoiset <[email protected]>
Reviewed-by: Bas Nieuwenhuizen <[email protected]>
Diffstat (limited to 'src')
-rw-r--r-- | src/amd/vulkan/radv_pipeline.c | 64 | ||||
-rw-r--r-- | src/amd/vulkan/radv_shader.c | 70 | ||||
-rw-r--r-- | src/amd/vulkan/radv_shader.h | 6 |
3 files changed, 77 insertions, 63 deletions
diff --git a/src/amd/vulkan/radv_pipeline.c b/src/amd/vulkan/radv_pipeline.c index 7d071533225..91577402a2c 100644 --- a/src/amd/vulkan/radv_pipeline.c +++ b/src/amd/vulkan/radv_pipeline.c @@ -78,75 +78,13 @@ void radv_DestroyPipeline( static void radv_dump_pipeline_stats(struct radv_device *device, struct radv_pipeline *pipeline) { - unsigned lds_increment = device->physical_device->rad_info.chip_class >= CIK ? 512 : 256; - struct radv_shader_variant *var; - struct ac_shader_config *conf; int i; - FILE *file = stderr; - unsigned max_simd_waves; - unsigned lds_per_wave = 0; - - switch (device->physical_device->rad_info.family) { - /* These always have 8 waves: */ - case CHIP_POLARIS10: - case CHIP_POLARIS11: - case CHIP_POLARIS12: - max_simd_waves = 8; - break; - default: - max_simd_waves = 10; - } for (i = 0; i < MESA_SHADER_STAGES; i++) { if (!pipeline->shaders[i]) continue; - var = pipeline->shaders[i]; - - conf = &var->config; - - if (i == MESA_SHADER_FRAGMENT) { - lds_per_wave = conf->lds_size * lds_increment + - align(var->info.fs.num_interp * 48, lds_increment); - } - if (conf->num_sgprs) { - if (device->physical_device->rad_info.chip_class >= VI) - max_simd_waves = MIN2(max_simd_waves, 800 / conf->num_sgprs); - else - max_simd_waves = MIN2(max_simd_waves, 512 / conf->num_sgprs); - } - - if (conf->num_vgprs) - max_simd_waves = MIN2(max_simd_waves, 256 / conf->num_vgprs); - - /* LDS is 64KB per CU (4 SIMDs), divided into 16KB blocks per SIMD - * that PS can use. - */ - if (lds_per_wave) - max_simd_waves = MIN2(max_simd_waves, 16384 / lds_per_wave); - - fprintf(file, "\n%s:\n", - radv_get_shader_name(var, i)); - if (i == MESA_SHADER_FRAGMENT) { - fprintf(file, "*** SHADER CONFIG ***\n" - "SPI_PS_INPUT_ADDR = 0x%04x\n" - "SPI_PS_INPUT_ENA = 0x%04x\n", - conf->spi_ps_input_addr, conf->spi_ps_input_ena); - } - fprintf(file, "*** SHADER STATS ***\n" - "SGPRS: %d\n" - "VGPRS: %d\n" - "Spilled SGPRs: %d\n" - "Spilled VGPRs: %d\n" - "Code Size: %d bytes\n" - "LDS: %d blocks\n" - "Scratch: %d bytes per wave\n" - "Max Waves: %d\n" - "********************\n\n\n", - conf->num_sgprs, conf->num_vgprs, - conf->spilled_sgprs, conf->spilled_vgprs, var->code_size, - conf->lds_size, conf->scratch_bytes_per_wave, - max_simd_waves); + radv_shader_dump_stats(device, pipeline->shaders[i], i, stderr); } } diff --git a/src/amd/vulkan/radv_shader.c b/src/amd/vulkan/radv_shader.c index 87deb7c3ab7..ca0ad2d5758 100644 --- a/src/amd/vulkan/radv_shader.c +++ b/src/amd/vulkan/radv_shader.c @@ -531,3 +531,73 @@ radv_get_shader_name(struct radv_shader_variant *var, gl_shader_stage stage) }; } +void +radv_shader_dump_stats(struct radv_device *device, + struct radv_shader_variant *variant, + gl_shader_stage stage, + FILE *file) +{ + unsigned lds_increment = device->physical_device->rad_info.chip_class >= CIK ? 512 : 256; + struct ac_shader_config *conf; + unsigned max_simd_waves; + unsigned lds_per_wave = 0; + + switch (device->physical_device->rad_info.family) { + /* These always have 8 waves: */ + case CHIP_POLARIS10: + case CHIP_POLARIS11: + case CHIP_POLARIS12: + max_simd_waves = 8; + break; + default: + max_simd_waves = 10; + } + + conf = &variant->config; + + if (stage == MESA_SHADER_FRAGMENT) { + lds_per_wave = conf->lds_size * lds_increment + + align(variant->info.fs.num_interp * 48, + lds_increment); + } + + if (conf->num_sgprs) { + if (device->physical_device->rad_info.chip_class >= VI) + max_simd_waves = MIN2(max_simd_waves, 800 / conf->num_sgprs); + else + max_simd_waves = MIN2(max_simd_waves, 512 / conf->num_sgprs); + } + + if (conf->num_vgprs) + max_simd_waves = MIN2(max_simd_waves, 256 / conf->num_vgprs); + + /* LDS is 64KB per CU (4 SIMDs), divided into 16KB blocks per SIMD + * that PS can use. + */ + if (lds_per_wave) + max_simd_waves = MIN2(max_simd_waves, 16384 / lds_per_wave); + + fprintf(file, "\n%s:\n", radv_get_shader_name(variant, stage)); + + if (stage == MESA_SHADER_FRAGMENT) { + fprintf(file, "*** SHADER CONFIG ***\n" + "SPI_PS_INPUT_ADDR = 0x%04x\n" + "SPI_PS_INPUT_ENA = 0x%04x\n", + conf->spi_ps_input_addr, conf->spi_ps_input_ena); + } + + fprintf(file, "*** SHADER STATS ***\n" + "SGPRS: %d\n" + "VGPRS: %d\n" + "Spilled SGPRs: %d\n" + "Spilled VGPRs: %d\n" + "Code Size: %d bytes\n" + "LDS: %d blocks\n" + "Scratch: %d bytes per wave\n" + "Max Waves: %d\n" + "********************\n\n\n", + conf->num_sgprs, conf->num_vgprs, + conf->spilled_sgprs, conf->spilled_vgprs, variant->code_size, + conf->lds_size, conf->scratch_bytes_per_wave, + max_simd_waves); +} diff --git a/src/amd/vulkan/radv_shader.h b/src/amd/vulkan/radv_shader.h index 9de3c27550d..467557e5fc3 100644 --- a/src/amd/vulkan/radv_shader.h +++ b/src/amd/vulkan/radv_shader.h @@ -100,4 +100,10 @@ radv_shader_stage_to_user_data_0(gl_shader_stage stage, bool has_gs, const char * radv_get_shader_name(struct radv_shader_variant *var, gl_shader_stage stage); +void +radv_shader_dump_stats(struct radv_device *device, + struct radv_shader_variant *variant, + gl_shader_stage stage, + FILE *file); + #endif |