diff options
author | Eric Anholt <[email protected]> | 2015-01-06 13:35:21 -0800 |
---|---|---|
committer | Eric Anholt <[email protected]> | 2016-11-03 18:42:58 -0700 |
commit | 80157466cd56bfaeadbdcac497b04c16c2732a3b (patch) | |
tree | 2e8f0ec0734deeee8ca66de83f87841d9f56f3b4 /src | |
parent | bedb99608735aaa260eba0144ca6d46dbe43be55 (diff) |
vc4: Add miptree/texture state support for ETC1 compressed textures.
The format isn't flagged as enabled at runtime yet, because we need kernel
validation support.
Diffstat (limited to 'src')
-rw-r--r-- | src/gallium/drivers/vc4/kernel/vc4_validate.c | 7 | ||||
-rw-r--r-- | src/gallium/drivers/vc4/vc4_formats.c | 2 | ||||
-rw-r--r-- | src/gallium/drivers/vc4/vc4_resource.c | 19 | ||||
-rw-r--r-- | src/gallium/drivers/vc4/vc4_screen.c | 3 | ||||
-rw-r--r-- | src/gallium/drivers/vc4/vc4_state.c | 3 |
5 files changed, 33 insertions, 1 deletions
diff --git a/src/gallium/drivers/vc4/kernel/vc4_validate.c b/src/gallium/drivers/vc4/kernel/vc4_validate.c index 4ef01108b79..a9dce1fa379 100644 --- a/src/gallium/drivers/vc4/kernel/vc4_validate.c +++ b/src/gallium/drivers/vc4/kernel/vc4_validate.c @@ -640,6 +640,13 @@ reloc_tex(struct vc4_exec_info *exec, cpp = 1; break; case VC4_TEXTURE_TYPE_ETC1: + /* ETC1 is arranged as 64-bit blocks, where each block is 4x4 + * pixels. + */ + cpp = 8; + width = (width + 3) >> 2; + height = (height + 3) >> 2; + break; case VC4_TEXTURE_TYPE_BW1: case VC4_TEXTURE_TYPE_A4: case VC4_TEXTURE_TYPE_A1: diff --git a/src/gallium/drivers/vc4/vc4_formats.c b/src/gallium/drivers/vc4/vc4_formats.c index dd700cdec7d..42cdad115b2 100644 --- a/src/gallium/drivers/vc4/vc4_formats.c +++ b/src/gallium/drivers/vc4/vc4_formats.c @@ -83,6 +83,8 @@ static const struct vc4_format vc4_format_table[] = { FORMAT(B5G6R5_UNORM, RGB565, RGB565, SWIZ(X, Y, Z, 1)), + FORMAT(ETC1_RGB8, NO, ETC1, SWIZ(X, Y, Z, 1)), + /* Depth sampling will be handled by doing nearest filtering and not * unpacking the RGBA value. */ diff --git a/src/gallium/drivers/vc4/vc4_resource.c b/src/gallium/drivers/vc4/vc4_resource.c index 704cd71ea4b..e4784ff86e2 100644 --- a/src/gallium/drivers/vc4/vc4_resource.c +++ b/src/gallium/drivers/vc4/vc4_resource.c @@ -283,6 +283,20 @@ vc4_resource_transfer_map(struct pipe_context *pctx, if (usage & PIPE_TRANSFER_MAP_DIRECTLY) return NULL; + if (format == PIPE_FORMAT_ETC1_RGB8) { + /* ETC1 is arranged as 64-bit blocks, where each block + * is 4x4 pixels. Texture tiling operates on the + * 64-bit block the way it would an uncompressed + * pixels. + */ + assert(!(ptrans->box.x & 3)); + assert(!(ptrans->box.y & 3)); + ptrans->box.x >>= 2; + ptrans->box.y >>= 2; + ptrans->box.width = (ptrans->box.width + 3) >> 2; + ptrans->box.height = (ptrans->box.height + 3) >> 2; + } + /* We need to align the box to utile boundaries, since that's * what load/store operates on. This may cause us to need to * read out the original contents in that border area. Right @@ -387,6 +401,11 @@ vc4_setup_slices(struct vc4_resource *rsc) struct pipe_resource *prsc = &rsc->base.b; uint32_t width = prsc->width0; uint32_t height = prsc->height0; + if (prsc->format == PIPE_FORMAT_ETC1_RGB8) { + width = (width + 3) >> 2; + height = (height + 3) >> 2; + } + uint32_t pot_width = util_next_power_of_two(width); uint32_t pot_height = util_next_power_of_two(height); uint32_t offset = 0; diff --git a/src/gallium/drivers/vc4/vc4_screen.c b/src/gallium/drivers/vc4/vc4_screen.c index 0f9ba541aab..9aa80cab873 100644 --- a/src/gallium/drivers/vc4/vc4_screen.c +++ b/src/gallium/drivers/vc4/vc4_screen.c @@ -486,7 +486,8 @@ vc4_screen_is_format_supported(struct pipe_screen *pscreen, } if ((usage & PIPE_BIND_SAMPLER_VIEW) && - vc4_tex_format_supported(format)) { + vc4_tex_format_supported(format) && + format != PIPE_FORMAT_ETC1_RGB8) { retval |= PIPE_BIND_SAMPLER_VIEW; } diff --git a/src/gallium/drivers/vc4/vc4_state.c b/src/gallium/drivers/vc4/vc4_state.c index 12471589510..5403c34af96 100644 --- a/src/gallium/drivers/vc4/vc4_state.c +++ b/src/gallium/drivers/vc4/vc4_state.c @@ -615,6 +615,9 @@ vc4_create_sampler_view(struct pipe_context *pctx, struct pipe_resource *prsc, VC4_SET_FIELD(prsc->height0 & 2047, VC4_TEX_P1_HEIGHT) | VC4_SET_FIELD(prsc->width0 & 2047, VC4_TEX_P1_WIDTH)); + if (prsc->format == PIPE_FORMAT_ETC1_RGB8) + so->texture_p1 |= VC4_TEX_P1_ETCFLIP_MASK; + return &so->base; } |