summaryrefslogtreecommitdiffstats
path: root/src
diff options
context:
space:
mode:
authorChad Versace <[email protected]>2013-10-02 17:21:33 -0700
committerChad Versace <[email protected]>2013-10-07 11:55:24 -0700
commit6cd1da83770e1d93b60b13f5518ee5eaa2e6c19d (patch)
tree1248a176e05ba0c05a3ab962d15d97f5fdf9b081 /src
parentccad802ed515e0f47f39797d080f9999e7b642ac (diff)
gen7: Use logical, not physical, dims in 3DSTATE_DEPTH_BUFFER (v2)
In 3DSTATE_DEPTH_BUFFER, we set Width and Height to the miptree slice's physical dimensions. (Logical and physical dimensions may differ for multisample surfaces). However, in SURFACE_STATE, we always set Width and Height to the slice's logical dimensions. We should do the same for 3DSTATE_DEPTH_BUFFER, because the hw docs say so. No Piglit regressions (-x glx -x glean) on Ivybridge with Wayland. v2: No Piglit regressions, for real this time. Reviewed-by: Jordan Justen <[email protected]> Signed-off-by: Chad Versace <[email protected]>
Diffstat (limited to 'src')
-rw-r--r--src/mesa/drivers/dri/i965/gen7_blorp.cpp4
-rw-r--r--src/mesa/drivers/dri/i965/gen7_misc_state.c4
2 files changed, 4 insertions, 4 deletions
diff --git a/src/mesa/drivers/dri/i965/gen7_blorp.cpp b/src/mesa/drivers/dri/i965/gen7_blorp.cpp
index 9df3d929ffb..f64e5369abf 100644
--- a/src/mesa/drivers/dri/i965/gen7_blorp.cpp
+++ b/src/mesa/drivers/dri/i965/gen7_blorp.cpp
@@ -706,8 +706,8 @@ gen7_blorp_emit_depth_stencil_config(struct brw_context *brw,
surfwidth = params->depth.width;
surfheight = params->depth.height;
} else {
- surfwidth = params->depth.mt->physical_width0;
- surfheight = params->depth.mt->physical_height0;
+ surfwidth = params->depth.mt->logical_width0;
+ surfheight = params->depth.mt->logical_height0;
}
/* 3DSTATE_DEPTH_BUFFER */
diff --git a/src/mesa/drivers/dri/i965/gen7_misc_state.c b/src/mesa/drivers/dri/i965/gen7_misc_state.c
index eb942cfcafa..3f3833e98e6 100644
--- a/src/mesa/drivers/dri/i965/gen7_misc_state.c
+++ b/src/mesa/drivers/dri/i965/gen7_misc_state.c
@@ -93,8 +93,8 @@ gen7_emit_depth_stencil_hiz(struct brw_context *brw,
lod = irb ? irb->mt_level - irb->mt->first_level : 0;
if (mt) {
- width = mt->physical_width0;
- height = mt->physical_height0;
+ width = mt->logical_width0;
+ height = mt->logical_height0;
}
/* _NEW_DEPTH, _NEW_STENCIL, _NEW_BUFFERS */