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authorEric Anholt <[email protected]>2014-09-05 14:38:13 -0700
committerEric Anholt <[email protected]>2014-09-09 07:29:16 -0700
commit5774f164532ac85d213469f688ea87e1da16d444 (patch)
tree4de34d1678c1a4755a252186acd8fa36b9ed71e4 /src
parentfd6e4fccade0a5e2a4877d01a57c255a47a06200 (diff)
vc4: Fill out the stencil clear field.
The rest of stencil handling isn't done yet, but it documents an extra cl_u8(0) and helps make it obvious why we don't need to format clear_depth the same way the depth/stencil buffer is formatted.
Diffstat (limited to 'src')
-rw-r--r--src/gallium/drivers/vc4/vc4_context.c2
-rw-r--r--src/gallium/drivers/vc4/vc4_context.h1
-rw-r--r--src/gallium/drivers/vc4/vc4_draw.c3
3 files changed, 5 insertions, 1 deletions
diff --git a/src/gallium/drivers/vc4/vc4_context.c b/src/gallium/drivers/vc4/vc4_context.c
index 7b9e6f097e9..d14da676334 100644
--- a/src/gallium/drivers/vc4/vc4_context.c
+++ b/src/gallium/drivers/vc4/vc4_context.c
@@ -59,7 +59,7 @@ vc4_setup_rcl(struct vc4_context *vc4)
cl_u32(&vc4->rcl, vc4->clear_color[0]);
cl_u32(&vc4->rcl, vc4->clear_color[1]);
cl_u32(&vc4->rcl, vc4->clear_depth);
- cl_u8(&vc4->rcl, 0);
+ cl_u8(&vc4->rcl, vc4->clear_stencil);
cl_start_reloc(&vc4->rcl, 1);
cl_u8(&vc4->rcl, VC4_PACKET_TILE_RENDERING_MODE_CONFIG);
diff --git a/src/gallium/drivers/vc4/vc4_context.h b/src/gallium/drivers/vc4/vc4_context.h
index c2fdcae231b..b82c08c5ff8 100644
--- a/src/gallium/drivers/vc4/vc4_context.h
+++ b/src/gallium/drivers/vc4/vc4_context.h
@@ -146,6 +146,7 @@ struct vc4_context {
uint32_t resolve;
uint32_t clear_color[2];
uint32_t clear_depth; /**< 24-bit unorm depth */
+ uint8_t clear_stencil;
/**
* Set if some drawing (triangles, blits, or just a glClear()) has
diff --git a/src/gallium/drivers/vc4/vc4_draw.c b/src/gallium/drivers/vc4/vc4_draw.c
index d1035bb30ab..90d98b37b01 100644
--- a/src/gallium/drivers/vc4/vc4_draw.c
+++ b/src/gallium/drivers/vc4/vc4_draw.c
@@ -231,6 +231,9 @@ vc4_clear(struct pipe_context *pctx, unsigned buffers,
vc4->clear_depth = util_pack_z(PIPE_FORMAT_Z24X8_UNORM, depth);
}
+ if (buffers & PIPE_CLEAR_STENCIL)
+ vc4->clear_stencil = stencil;
+
vc4->cleared |= buffers;
vc4->resolve |= buffers;