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authorDave Airlie <[email protected]>2018-02-05 16:46:06 +1000
committerDave Airlie <[email protected]>2018-02-07 06:08:11 +1000
commit4e3b43f18046538171928256acefd01d97eed0ae (patch)
treefa0266229cf9b5da3475abe544c35108efb715f5 /src
parent8bdad9fa1faf3fa258a7731605e8b2bf218a33bd (diff)
r600/atomic: fix ATOMCAS instruction.
This has 4 srcs. This fixes: KHR-GL45.shader_atomic_counter_ops_tests.ShaderAtomicCounterOpsExchangeTestCase Reviewed-by: Roland Scheidegger <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
Diffstat (limited to 'src')
-rw-r--r--src/gallium/drivers/r600/r600_shader.c32
1 files changed, 31 insertions, 1 deletions
diff --git a/src/gallium/drivers/r600/r600_shader.c b/src/gallium/drivers/r600/r600_shader.c
index 4874d14a581..08bc1484793 100644
--- a/src/gallium/drivers/r600/r600_shader.c
+++ b/src/gallium/drivers/r600/r600_shader.c
@@ -8680,6 +8680,33 @@ static int tgsi_atomic_op_gds(struct r600_shader_ctx *ctx)
if (r)
return r;
+ if (gds_op == FETCH_OP_GDS_CMP_XCHG_RET) {
+ if (inst->Src[3].Register.File == TGSI_FILE_IMMEDIATE) {
+ int value = (ctx->literals[4 * inst->Src[3].Register.Index + inst->Src[3].Register.SwizzleX]);
+ memset(&alu, 0, sizeof(struct r600_bytecode_alu));
+ alu.op = ALU_OP1_MOV;
+ alu.dst.sel = ctx->temp_reg;
+ alu.dst.chan = is_cm ? 2 : 1;
+ alu.src[0].sel = V_SQ_ALU_SRC_LITERAL;
+ alu.src[0].value = value;
+ alu.last = 1;
+ alu.dst.write = 1;
+ r = r600_bytecode_add_alu(ctx->bc, &alu);
+ if (r)
+ return r;
+ } else {
+ memset(&alu, 0, sizeof(struct r600_bytecode_alu));
+ alu.op = ALU_OP1_MOV;
+ alu.dst.sel = ctx->temp_reg;
+ alu.dst.chan = is_cm ? 2 : 1;
+ r600_bytecode_src(&alu.src[0], &ctx->src[3], 0);
+ alu.last = 1;
+ alu.dst.write = 1;
+ r = r600_bytecode_add_alu(ctx->bc, &alu);
+ if (r)
+ return r;
+ }
+ }
if (inst->Src[2].Register.File == TGSI_FILE_IMMEDIATE) {
int value = (ctx->literals[4 * inst->Src[2].Register.Index + inst->Src[2].Register.SwizzleX]);
int abs_value = abs(value);
@@ -8719,7 +8746,10 @@ static int tgsi_atomic_op_gds(struct r600_shader_ctx *ctx)
gds.src_gpr2 = 0;
gds.src_sel_x = is_cm ? 0 : 4;
gds.src_sel_y = is_cm ? 1 : 0;
- gds.src_sel_z = 7;
+ if (gds_op == FETCH_OP_GDS_CMP_XCHG_RET)
+ gds.src_sel_z = is_cm ? 2 : 1;
+ else
+ gds.src_sel_z = 7;
gds.dst_sel_x = 0;
gds.dst_sel_y = 7;
gds.dst_sel_z = 7;