diff options
author | Marek Olšák <[email protected]> | 2017-11-07 03:52:34 +0100 |
---|---|---|
committer | Marek Olšák <[email protected]> | 2017-11-07 17:58:40 +0100 |
commit | 33000e7c437510bac44a42102d74554aa1259f18 (patch) | |
tree | 8087363b62cbae2bc940ec310be5374ac9aaf333 /src | |
parent | cde664ab81dba8c7f0fa15ef6e28aac463719ac5 (diff) |
radeonsi: add si_screen::has_ls_vgpr_init_bug
Reviewed-by: Nicolai Hähnle <[email protected]>
Diffstat (limited to 'src')
-rw-r--r-- | src/gallium/drivers/radeonsi/si_pipe.c | 2 | ||||
-rw-r--r-- | src/gallium/drivers/radeonsi/si_pipe.h | 1 | ||||
-rw-r--r-- | src/gallium/drivers/radeonsi/si_shader.c | 3 | ||||
-rw-r--r-- | src/gallium/drivers/radeonsi/si_state_draw.c | 2 |
4 files changed, 5 insertions, 3 deletions
diff --git a/src/gallium/drivers/radeonsi/si_pipe.c b/src/gallium/drivers/radeonsi/si_pipe.c index 1ca5ca38df3..391997db842 100644 --- a/src/gallium/drivers/radeonsi/si_pipe.c +++ b/src/gallium/drivers/radeonsi/si_pipe.c @@ -1074,6 +1074,8 @@ struct pipe_screen *radeonsi_screen_create(struct radeon_winsys *ws, sscreen->b.family <= CHIP_POLARIS12) || sscreen->b.family == CHIP_VEGA10 || sscreen->b.family == CHIP_RAVEN; + sscreen->has_ls_vgpr_init_bug = sscreen->b.family == CHIP_VEGA10 || + sscreen->b.family == CHIP_RAVEN; if (sscreen->b.debug_flags & DBG(DPBB)) { sscreen->dpbb_allowed = true; diff --git a/src/gallium/drivers/radeonsi/si_pipe.h b/src/gallium/drivers/radeonsi/si_pipe.h index ab82064571a..6be51bb3ec9 100644 --- a/src/gallium/drivers/radeonsi/si_pipe.h +++ b/src/gallium/drivers/radeonsi/si_pipe.h @@ -97,6 +97,7 @@ struct si_screen { bool commutative_blend_add; bool clear_db_cache_before_clear; bool has_msaa_sample_loc_bug; + bool has_ls_vgpr_init_bug; bool dpbb_allowed; bool dfsm_allowed; bool llvm_has_working_vgpr_indexing; diff --git a/src/gallium/drivers/radeonsi/si_shader.c b/src/gallium/drivers/radeonsi/si_shader.c index 6bc08dd3890..c95f8d7ed73 100644 --- a/src/gallium/drivers/radeonsi/si_shader.c +++ b/src/gallium/drivers/radeonsi/si_shader.c @@ -6882,8 +6882,7 @@ static void si_build_vs_prolog_function(struct si_shader_context *ctx, si_init_exec_from_input(ctx, 3, 0); if (key->vs_prolog.as_ls && - (ctx->screen->b.family == CHIP_VEGA10 || - ctx->screen->b.family == CHIP_RAVEN)) { + ctx->screen->has_ls_vgpr_init_bug) { /* If there are no HS threads, SPI loads the LS VGPRs * starting at VGPR 0. Shift them back to where they * belong. diff --git a/src/gallium/drivers/radeonsi/si_state_draw.c b/src/gallium/drivers/radeonsi/si_state_draw.c index 994ed58a1b8..53f33ca0e19 100644 --- a/src/gallium/drivers/radeonsi/si_state_draw.c +++ b/src/gallium/drivers/radeonsi/si_state_draw.c @@ -1282,7 +1282,7 @@ void si_draw_vbo(struct pipe_context *ctx, const struct pipe_draw_info *info) } if (sctx->tes_shader.cso && - (sctx->b.family == CHIP_VEGA10 || sctx->b.family == CHIP_RAVEN)) { + sctx->screen->has_ls_vgpr_init_bug) { /* Determine whether the LS VGPR fix should be applied. * * It is only required when num input CPs > num output CPs, |