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authorMarek Olšák <[email protected]>2013-12-17 00:46:45 +0100
committerMarek Olšák <[email protected]>2013-12-17 15:41:46 +0100
commit249cb511c54d40a762c862a7e378a362db4a1ca0 (patch)
treea031f70ec85927e6c31b3f4aaab567f44c0f8d22 /src
parent3e2b0f801d7c8d80f6c0d9da3813d7ed8b84e3dd (diff)
radeonsi: flush HTILE when appropriate
Reviewed-by: Michel Dänzer <[email protected]>
Diffstat (limited to 'src')
-rw-r--r--src/gallium/drivers/radeonsi/r600_hw_context.c1
-rw-r--r--src/gallium/drivers/radeonsi/si_state.c3
-rw-r--r--src/gallium/drivers/radeonsi/si_state_draw.c6
3 files changed, 8 insertions, 2 deletions
diff --git a/src/gallium/drivers/radeonsi/r600_hw_context.c b/src/gallium/drivers/radeonsi/r600_hw_context.c
index 3003dad5e8a..c21a1013f93 100644
--- a/src/gallium/drivers/radeonsi/r600_hw_context.c
+++ b/src/gallium/drivers/radeonsi/r600_hw_context.c
@@ -197,6 +197,7 @@ void si_context_flush(struct r600_context *ctx, unsigned flags)
ctx->b.flags |= R600_CONTEXT_FLUSH_AND_INV_CB |
R600_CONTEXT_FLUSH_AND_INV_CB_META |
R600_CONTEXT_FLUSH_AND_INV_DB |
+ R600_CONTEXT_FLUSH_AND_INV_DB_META |
R600_CONTEXT_INV_TEX_CACHE;
si_emit_cache_flush(&ctx->b, NULL);
diff --git a/src/gallium/drivers/radeonsi/si_state.c b/src/gallium/drivers/radeonsi/si_state.c
index 9b9e9737111..ede8827fe47 100644
--- a/src/gallium/drivers/radeonsi/si_state.c
+++ b/src/gallium/drivers/radeonsi/si_state.c
@@ -2099,7 +2099,8 @@ static void si_set_framebuffer_state(struct pipe_context *ctx,
R600_CONTEXT_FLUSH_AND_INV_CB_META;
}
if (rctx->framebuffer.zsbuf) {
- rctx->b.flags |= R600_CONTEXT_FLUSH_AND_INV_DB;
+ rctx->b.flags |= R600_CONTEXT_FLUSH_AND_INV_DB |
+ R600_CONTEXT_FLUSH_AND_INV_DB_META;
}
util_copy_framebuffer_state(&rctx->framebuffer, state);
diff --git a/src/gallium/drivers/radeonsi/si_state_draw.c b/src/gallium/drivers/radeonsi/si_state_draw.c
index 63df3b555c3..a3104d0a266 100644
--- a/src/gallium/drivers/radeonsi/si_state_draw.c
+++ b/src/gallium/drivers/radeonsi/si_state_draw.c
@@ -676,6 +676,10 @@ void si_emit_cache_flush(struct r600_common_context *rctx, struct r600_atom *ato
radeon_emit(cs, PKT3(PKT3_EVENT_WRITE, 0, 0));
radeon_emit(cs, EVENT_TYPE(V_028A90_FLUSH_AND_INV_CB_META) | EVENT_INDEX(0));
}
+ if (rctx->flags & R600_CONTEXT_FLUSH_AND_INV_DB_META) {
+ radeon_emit(cs, PKT3(PKT3_EVENT_WRITE, 0, 0));
+ radeon_emit(cs, EVENT_TYPE(V_028A90_FLUSH_AND_INV_DB_META) | EVENT_INDEX(0));
+ }
if (rctx->flags & R600_CONTEXT_WAIT_3D_IDLE) {
radeon_emit(cs, PKT3(PKT3_EVENT_WRITE, 0, 0));
@@ -689,7 +693,7 @@ void si_emit_cache_flush(struct r600_common_context *rctx, struct r600_atom *ato
rctx->flags = 0;
}
-const struct r600_atom si_atom_cache_flush = { si_emit_cache_flush, 11 }; /* number of CS dwords */
+const struct r600_atom si_atom_cache_flush = { si_emit_cache_flush, 13 }; /* number of CS dwords */
void si_draw_vbo(struct pipe_context *ctx, const struct pipe_draw_info *info)
{