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authorMarek Olšák <[email protected]>2017-06-15 00:29:41 +0200
committerMarek Olšák <[email protected]>2017-06-22 01:51:02 +0200
commitfdca690e91f932b494611a9e8808778405138808 (patch)
tree33bd50e06e8442459f977752ebfa9fecbf9ce5c6 /src
parentb007744051b5f49a7ac69bebf57836a201e8dcbf (diff)
radeonsi: add separate HUD counters for CB and DB cache flushes
Reviewed-by: Nicolai Hähnle <[email protected]>
Diffstat (limited to 'src')
-rw-r--r--src/gallium/drivers/radeon/r600_pipe_common.h3
-rw-r--r--src/gallium/drivers/radeon/r600_query.c17
-rw-r--r--src/gallium/drivers/radeon/r600_query.h3
-rw-r--r--src/gallium/drivers/radeonsi/si_state_draw.c7
4 files changed, 20 insertions, 10 deletions
diff --git a/src/gallium/drivers/radeon/r600_pipe_common.h b/src/gallium/drivers/radeon/r600_pipe_common.h
index 006b795fe29..310fb576847 100644
--- a/src/gallium/drivers/radeon/r600_pipe_common.h
+++ b/src/gallium/drivers/radeon/r600_pipe_common.h
@@ -595,7 +595,8 @@ struct r600_common_context {
unsigned num_vs_flushes;
unsigned num_ps_flushes;
unsigned num_cs_flushes;
- unsigned num_fb_cache_flushes;
+ unsigned num_cb_cache_flushes;
+ unsigned num_db_cache_flushes;
unsigned num_L2_invalidates;
unsigned num_L2_writebacks;
unsigned num_resident_handles;
diff --git a/src/gallium/drivers/radeon/r600_query.c b/src/gallium/drivers/radeon/r600_query.c
index 8bd94e6a940..3308ad82c3d 100644
--- a/src/gallium/drivers/radeon/r600_query.c
+++ b/src/gallium/drivers/radeon/r600_query.c
@@ -125,8 +125,11 @@ static bool r600_query_sw_begin(struct r600_common_context *rctx,
case R600_QUERY_NUM_CS_FLUSHES:
query->begin_result = rctx->num_cs_flushes;
break;
- case R600_QUERY_NUM_FB_CACHE_FLUSHES:
- query->begin_result = rctx->num_fb_cache_flushes;
+ case R600_QUERY_NUM_CB_CACHE_FLUSHES:
+ query->begin_result = rctx->num_cb_cache_flushes;
+ break;
+ case R600_QUERY_NUM_DB_CACHE_FLUSHES:
+ query->begin_result = rctx->num_db_cache_flushes;
break;
case R600_QUERY_NUM_L2_INVALIDATES:
query->begin_result = rctx->num_L2_invalidates;
@@ -270,8 +273,11 @@ static bool r600_query_sw_end(struct r600_common_context *rctx,
case R600_QUERY_NUM_CS_FLUSHES:
query->end_result = rctx->num_cs_flushes;
break;
- case R600_QUERY_NUM_FB_CACHE_FLUSHES:
- query->end_result = rctx->num_fb_cache_flushes;
+ case R600_QUERY_NUM_CB_CACHE_FLUSHES:
+ query->end_result = rctx->num_cb_cache_flushes;
+ break;
+ case R600_QUERY_NUM_DB_CACHE_FLUSHES:
+ query->end_result = rctx->num_db_cache_flushes;
break;
case R600_QUERY_NUM_L2_INVALIDATES:
query->end_result = rctx->num_L2_invalidates;
@@ -1837,7 +1843,8 @@ static struct pipe_driver_query_info r600_driver_query_list[] = {
X("num-vs-flushes", NUM_VS_FLUSHES, UINT64, AVERAGE),
X("num-ps-flushes", NUM_PS_FLUSHES, UINT64, AVERAGE),
X("num-cs-flushes", NUM_CS_FLUSHES, UINT64, AVERAGE),
- X("num-fb-cache-flushes", NUM_FB_CACHE_FLUSHES, UINT64, AVERAGE),
+ X("num-CB-cache-flushes", NUM_CB_CACHE_FLUSHES, UINT64, AVERAGE),
+ X("num-DB-cache-flushes", NUM_DB_CACHE_FLUSHES, UINT64, AVERAGE),
X("num-L2-invalidates", NUM_L2_INVALIDATES, UINT64, AVERAGE),
X("num-L2-writebacks", NUM_L2_WRITEBACKS, UINT64, AVERAGE),
X("num-resident-handles", NUM_RESIDENT_HANDLES, UINT64, AVERAGE),
diff --git a/src/gallium/drivers/radeon/r600_query.h b/src/gallium/drivers/radeon/r600_query.h
index 9e6617f342a..1f97e115906 100644
--- a/src/gallium/drivers/radeon/r600_query.h
+++ b/src/gallium/drivers/radeon/r600_query.h
@@ -51,7 +51,8 @@ enum {
R600_QUERY_NUM_VS_FLUSHES,
R600_QUERY_NUM_PS_FLUSHES,
R600_QUERY_NUM_CS_FLUSHES,
- R600_QUERY_NUM_FB_CACHE_FLUSHES,
+ R600_QUERY_NUM_CB_CACHE_FLUSHES,
+ R600_QUERY_NUM_DB_CACHE_FLUSHES,
R600_QUERY_NUM_L2_INVALIDATES,
R600_QUERY_NUM_L2_WRITEBACKS,
R600_QUERY_NUM_RESIDENT_HANDLES,
diff --git a/src/gallium/drivers/radeonsi/si_state_draw.c b/src/gallium/drivers/radeonsi/si_state_draw.c
index ec564c1a057..d039e015cc6 100644
--- a/src/gallium/drivers/radeonsi/si_state_draw.c
+++ b/src/gallium/drivers/radeonsi/si_state_draw.c
@@ -861,9 +861,10 @@ void si_emit_cache_flush(struct si_context *sctx)
uint32_t flush_cb_db = rctx->flags & (SI_CONTEXT_FLUSH_AND_INV_CB |
SI_CONTEXT_FLUSH_AND_INV_DB);
- if (rctx->flags & (SI_CONTEXT_FLUSH_AND_INV_CB |
- SI_CONTEXT_FLUSH_AND_INV_DB))
- sctx->b.num_fb_cache_flushes++;
+ if (rctx->flags & SI_CONTEXT_FLUSH_AND_INV_CB)
+ sctx->b.num_cb_cache_flushes++;
+ if (rctx->flags & SI_CONTEXT_FLUSH_AND_INV_DB)
+ sctx->b.num_db_cache_flushes++;
/* SI has a bug that it always flushes ICACHE and KCACHE if either
* bit is set. An alternative way is to write SQC_CACHES, but that