r600: re-arrange state setup and emit so they are not mixed

4 files changed, 130 insertions, 108 deletions

diff --git a/src/mesa/drivers/dri/r600/r700_chip.c b/src/mesa/drivers/dri/r600/r700_chip.c
index 994463fa6d2..beb5b70245b 100644
--- a/src/mesa/drivers/dri/r600/r700_chip.c
+++ b/src/mesa/drivers/dri/r600/r700_chip.c
@@ -38,6 +38,8 @@
 #include "r700_vertprog.h"
 #include "r700_ioctl.h"
 
+#include "radeon_mipmap_tree.h"
+
 #define LINK_STATES(reg)                                            \
 do                                                                  \
 {                                                                   \
@@ -241,6 +243,68 @@ GLboolean r700InitChipObject(context_t *context)
     return GL_TRUE;
 }
 
+GLboolean r700SendTextureState(context_t *context)
+{
+    unsigned int i;
+    R700_CHIP_CONTEXT *r700 = (R700_CHIP_CONTEXT*)(&context->hw);
+    offset_modifiers offset_mod = {NO_SHIFT, 0, 0xFFFFFFFF};
+    struct radeon_bo *bo = NULL;
+    BATCH_LOCALS(&context->radeon);
+
+    for (i=0; i<R700_TEXTURE_NUMBERUNITS; i++) {
+	    radeonTexObj *t = r700->textures[i];
+	    if (t) {
+		    if (!t->image_override)
+			    bo = t->mt->bo;
+		    else
+			    bo = t->bo;
+		    if (bo) {
+
+			    r700SyncSurf(context, bo,
+					 RADEON_GEM_DOMAIN_GTT|RADEON_GEM_DOMAIN_VRAM,
+					 0, TC_ACTION_ENA_bit);
+
+			    BEGIN_BATCH_NO_AUTOSTATE(9);
+			    R600_OUT_BATCH(CP_PACKET3(R600_IT_SET_RESOURCE, 7));
+			    R600_OUT_BATCH(i * 7);
+			    R600_OUT_BATCH(r700->textures[i]->SQ_TEX_RESOURCE0);
+			    R600_OUT_BATCH(r700->textures[i]->SQ_TEX_RESOURCE1);
+			    R600_OUT_BATCH_RELOC(r700->textures[i]->SQ_TEX_RESOURCE2,
+						 bo,
+						 0,
+						 RADEON_GEM_DOMAIN_GTT|RADEON_GEM_DOMAIN_VRAM, 0, 0, &offset_mod);
+			    R600_OUT_BATCH_RELOC(r700->textures[i]->SQ_TEX_RESOURCE3,
+						 bo,
+						 r700->textures[i]->SQ_TEX_RESOURCE3,
+						 RADEON_GEM_DOMAIN_GTT|RADEON_GEM_DOMAIN_VRAM, 0, 0, &offset_mod);
+			    R600_OUT_BATCH(r700->textures[i]->SQ_TEX_RESOURCE4);
+			    R600_OUT_BATCH(r700->textures[i]->SQ_TEX_RESOURCE5);
+			    R600_OUT_BATCH(r700->textures[i]->SQ_TEX_RESOURCE6);
+			    END_BATCH();
+
+			    BEGIN_BATCH_NO_AUTOSTATE(5);
+			    R600_OUT_BATCH(CP_PACKET3(R600_IT_SET_SAMPLER, 3));
+			    R600_OUT_BATCH(i * 3);
+			    R600_OUT_BATCH(r700->textures[i]->SQ_TEX_SAMPLER0);
+			    R600_OUT_BATCH(r700->textures[i]->SQ_TEX_SAMPLER1);
+			    R600_OUT_BATCH(r700->textures[i]->SQ_TEX_SAMPLER2);
+			    END_BATCH();
+
+			    BEGIN_BATCH_NO_AUTOSTATE(2 + 4);
+			    R600_OUT_BATCH_REGSEQ((TD_PS_SAMPLER0_BORDER_RED + (i * 16)), 4);
+			    R600_OUT_BATCH(r700->textures[i]->TD_PS_SAMPLER0_BORDER_RED);
+			    R600_OUT_BATCH(r700->textures[i]->TD_PS_SAMPLER0_BORDER_GREEN);
+			    R600_OUT_BATCH(r700->textures[i]->TD_PS_SAMPLER0_BORDER_BLUE);
+			    R600_OUT_BATCH(r700->textures[i]->TD_PS_SAMPLER0_BORDER_ALPHA);
+			    END_BATCH();
+
+			    COMMIT_BATCH();
+		    }
+	    }
+    }
+    return GL_TRUE;
+}
+
 void r700SetupVTXConstants(GLcontext  * ctx,
 			   unsigned int nStreamID,
 			   void *       pAos,
diff --git a/src/mesa/drivers/dri/r600/r700_fragprog.c b/src/mesa/drivers/dri/r600/r700_fragprog.c
index 180d980442b..587134676bc 100644
--- a/src/mesa/drivers/dri/r600/r700_fragprog.c
+++ b/src/mesa/drivers/dri/r600/r700_fragprog.c
@@ -338,36 +338,6 @@ GLboolean r700SetupFragmentProgram(GLcontext * ctx)
         CLEARbit(r700->DB_SHADER_CONTROL.u32All, Z_EXPORT_ENABLE_bit);
     }
 
-    /* sent out shader constants. */
-
-    paramList = fp->mesa_program.Base.Parameters;
-
-    if(NULL != paramList)
-    {
-        _mesa_load_state_parameters(ctx, paramList);
-
-        unNumParamData = paramList->NumParameters * 4;
-
-        BEGIN_BATCH_NO_AUTOSTATE(2 + unNumParamData);
-        
-        R600_OUT_BATCH(CP_PACKET3(R600_IT_SET_ALU_CONST, unNumParamData));
-
-        /* assembler map const from very beginning. */
-        R600_OUT_BATCH(SQ_ALU_CONSTANT_PS_OFFSET * 4);
-
-        unNumParamData = paramList->NumParameters;
-
-        for(ui=0; ui<unNumParamData; ui++)
-        {
-            R600_OUT_BATCH(*((unsigned int*)&(paramList->ParameterValues[ui][0])));
-            R600_OUT_BATCH(*((unsigned int*)&(paramList->ParameterValues[ui][1])));
-            R600_OUT_BATCH(*((unsigned int*)&(paramList->ParameterValues[ui][2])));
-            R600_OUT_BATCH(*((unsigned int*)&(paramList->ParameterValues[ui][3])));
-        }
-        END_BATCH();
-        COMMIT_BATCH();
-    }
-
     // emit ps input map
     unBit = 1 << FRAG_ATTRIB_COL0;
     if(mesa_fp->Base.InputsRead & unBit)
@@ -424,5 +394,46 @@ GLboolean r700SetupFragmentProgram(GLcontext * ctx)
     return GL_TRUE;
 }
 
+GLboolean r700SendPSConstants(GLcontext * ctx)
+{
+    context_t *context = R700_CONTEXT(ctx);
+    BATCH_LOCALS(&context->radeon);
+    R700_CHIP_CONTEXT *r700 = (R700_CHIP_CONTEXT*)(&context->hw);
+    struct r700_fragment_program *fp = (struct r700_fragment_program *)
+	                                   (ctx->FragmentProgram._Current);
+    struct gl_program_parameter_list *paramList;
+    unsigned int unNumParamData;
+    unsigned int ui;
+
+    /* sent out shader constants. */
+    paramList = fp->mesa_program.Base.Parameters;
+
+    if(NULL != paramList)
+    {
+        _mesa_load_state_parameters(ctx, paramList);
+
+        unNumParamData = paramList->NumParameters * 4;
+
+        BEGIN_BATCH_NO_AUTOSTATE(2 + unNumParamData);
+
+        R600_OUT_BATCH(CP_PACKET3(R600_IT_SET_ALU_CONST, unNumParamData));
+
+        /* assembler map const from very beginning. */
+        R600_OUT_BATCH(SQ_ALU_CONSTANT_PS_OFFSET * 4);
 
+        unNumParamData = paramList->NumParameters;
+
+        for(ui=0; ui<unNumParamData; ui++)
+        {
+            R600_OUT_BATCH(*((unsigned int*)&(paramList->ParameterValues[ui][0])));
+            R600_OUT_BATCH(*((unsigned int*)&(paramList->ParameterValues[ui][1])));
+            R600_OUT_BATCH(*((unsigned int*)&(paramList->ParameterValues[ui][2])));
+            R600_OUT_BATCH(*((unsigned int*)&(paramList->ParameterValues[ui][3])));
+        }
+        END_BATCH();
+        COMMIT_BATCH();
+    }
+
+    return GL_TRUE;
+}
 
diff --git a/src/mesa/drivers/dri/r600/r700_render.c b/src/mesa/drivers/dri/r600/r700_render.c
index 80480696195..5bc1abdf2e3 100644
--- a/src/mesa/drivers/dri/r600/r700_render.c
+++ b/src/mesa/drivers/dri/r600/r700_render.c
@@ -44,7 +44,6 @@
 #include "tnl/t_vertex.h"
 #include "tnl/t_pipeline.h"
 
-#include "radeon_mipmap_tree.h"
 #include "r600_context.h"
 #include "r600_cmdbuf.h"
 
@@ -141,68 +140,6 @@ static GLboolean r700SetupShaders(GLcontext * ctx)
     return GL_TRUE;
 }
 
-GLboolean r700SendTextureState(context_t *context)
-{
-    unsigned int i;
-    R700_CHIP_CONTEXT *r700 = (R700_CHIP_CONTEXT*)(&context->hw);
-    offset_modifiers offset_mod = {NO_SHIFT, 0, 0xFFFFFFFF};
-    struct radeon_bo *bo = NULL;
-    BATCH_LOCALS(&context->radeon);
-
-    for (i=0; i<R700_TEXTURE_NUMBERUNITS; i++) {
-	    radeonTexObj *t = r700->textures[i];
-	    if (t) {
-		    if (!t->image_override)
-			    bo = t->mt->bo;
-		    else
-			    bo = t->bo;
-		    if (bo) {
-
-			    r700SyncSurf(context, bo,
-					 RADEON_GEM_DOMAIN_GTT|RADEON_GEM_DOMAIN_VRAM,
-					 0, TC_ACTION_ENA_bit);
-
-			    BEGIN_BATCH_NO_AUTOSTATE(9);
-			    R600_OUT_BATCH(CP_PACKET3(R600_IT_SET_RESOURCE, 7));
-			    R600_OUT_BATCH(i * 7);
-			    R600_OUT_BATCH(r700->textures[i]->SQ_TEX_RESOURCE0);
-			    R600_OUT_BATCH(r700->textures[i]->SQ_TEX_RESOURCE1);
-			    R600_OUT_BATCH_RELOC(r700->textures[i]->SQ_TEX_RESOURCE2,
-						 bo,
-						 0,
-						 RADEON_GEM_DOMAIN_GTT|RADEON_GEM_DOMAIN_VRAM, 0, 0, &offset_mod);
-			    R600_OUT_BATCH_RELOC(r700->textures[i]->SQ_TEX_RESOURCE3,
-						 bo,
-						 r700->textures[i]->SQ_TEX_RESOURCE3,
-						 RADEON_GEM_DOMAIN_GTT|RADEON_GEM_DOMAIN_VRAM, 0, 0, &offset_mod);
-			    R600_OUT_BATCH(r700->textures[i]->SQ_TEX_RESOURCE4);
-			    R600_OUT_BATCH(r700->textures[i]->SQ_TEX_RESOURCE5);
-			    R600_OUT_BATCH(r700->textures[i]->SQ_TEX_RESOURCE6);
-			    END_BATCH();
-
-			    BEGIN_BATCH_NO_AUTOSTATE(5);
-			    R600_OUT_BATCH(CP_PACKET3(R600_IT_SET_SAMPLER, 3));
-			    R600_OUT_BATCH(i * 3);
-			    R600_OUT_BATCH(r700->textures[i]->SQ_TEX_SAMPLER0);
-			    R600_OUT_BATCH(r700->textures[i]->SQ_TEX_SAMPLER1);
-			    R600_OUT_BATCH(r700->textures[i]->SQ_TEX_SAMPLER2);
-			    END_BATCH();
-
-			    BEGIN_BATCH_NO_AUTOSTATE(2 + 4);
-			    R600_OUT_BATCH_REGSEQ((TD_PS_SAMPLER0_BORDER_RED + (i * 16)), 4);
-			    R600_OUT_BATCH(r700->textures[i]->TD_PS_SAMPLER0_BORDER_RED);
-			    R600_OUT_BATCH(r700->textures[i]->TD_PS_SAMPLER0_BORDER_GREEN);
-			    R600_OUT_BATCH(r700->textures[i]->TD_PS_SAMPLER0_BORDER_BLUE);
-			    R600_OUT_BATCH(r700->textures[i]->TD_PS_SAMPLER0_BORDER_ALPHA);
-			    END_BATCH();
-
-			    COMMIT_BATCH();
-		    }
-	    }
-    }
-    return GL_TRUE;
-}
-
 GLboolean r700SyncSurf(context_t *context,
 		       struct radeon_bo *pbo,
 		       uint32_t read_domain,
@@ -342,29 +279,25 @@ static GLboolean r700RunRender(GLcontext * ctx,
     TNLcontext *tnl = TNL_CONTEXT(ctx);
     struct vertex_buffer *vb = &tnl->vb;
 
-    r700Start3D(context); /* TODO : this is too much. */
-
-    r700SendSQConfig(context);
-
     r700UpdateShaders(ctx);
-
     r700SetScissor(context);
     r700SetRenderTarget(context, 0);
     r700SetDepthTarget(context);
-
-    if(r700SetupStreams(ctx))
-    {
-        return GL_TRUE;
-    }
-
     r600UpdateTextureState(ctx);
-    r700SendTextureState(context);
-
     r700SetupShaders(ctx);
 
+
+    r700Start3D(context);
+    r700SendSQConfig(context);
     r700SendFSState(context); // FIXME just a place holder for now
     r700SendPSState(context);
     r700SendVSState(context);
+    r700SendVSConstants(ctx);
+    r700SendPSConstants(ctx);
+
+    r700SendTextureState(context);
+    if(r700SetupStreams(ctx))
+	    return GL_TRUE;
 
     r700SendUCPState(context);
     r700SendContextStates(context);
diff --git a/src/mesa/drivers/dri/r600/r700_vertprog.c b/src/mesa/drivers/dri/r600/r700_vertprog.c
index af6a6b8c295..fda6f756872 100644
--- a/src/mesa/drivers/dri/r600/r700_vertprog.c
+++ b/src/mesa/drivers/dri/r600/r700_vertprog.c
@@ -393,6 +393,20 @@ GLboolean r700SetupVertexProgram(GLcontext * ctx)
     CLEARbit(r700->SPI_PS_IN_CONTROL_0.u32All, LINEAR_GRADIENT_ENA_bit);
     */
 
+    return GL_TRUE;
+}
+
+GLboolean r700SendVSConstants(GLcontext * ctx)
+{
+    context_t *context = R700_CONTEXT(ctx);
+    BATCH_LOCALS(&context->radeon);
+    R700_CHIP_CONTEXT *r700 = (R700_CHIP_CONTEXT*)(&context->hw);
+    struct r700_vertex_program *vp
+             = (struct r700_vertex_program *)ctx->VertexProgram._Current;
+    struct gl_program_parameter_list *paramList;
+    unsigned int unNumParamData;
+    unsigned int ui;
+
     /* sent out shader constants. */
 
     paramList = vp->mesa_program.Base.Parameters;
@@ -403,8 +417,8 @@ GLboolean r700SetupVertexProgram(GLcontext * ctx)
 
         unNumParamData = paramList->NumParameters * 4;
 
-        BEGIN_BATCH_NO_AUTOSTATE(unNumParamData + 2); 
-        
+        BEGIN_BATCH_NO_AUTOSTATE(unNumParamData + 2);
+
         R600_OUT_BATCH(CP_PACKET3(R600_IT_SET_ALU_CONST, unNumParamData));
         /* assembler map const from very beginning. */
         R600_OUT_BATCH(SQ_ALU_CONSTANT_VS_OFFSET * 4);