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authorEric Anholt <[email protected]>2011-05-19 11:02:14 -0700
committerEric Anholt <[email protected]>2011-07-25 13:47:18 -0700
commita0e5affb22da50aeb30262f5ba0912b059d858ea (patch)
tree671a349dc347c86f924fa4005954d19419b66185 /src
parent808024689247561d3de225856fb6ef17430fd39e (diff)
i965: Use 3D clears on gen6+ to avoid inter-ring synchronization.
Improves firefox-talos-gfx around 5%.
Diffstat (limited to 'src')
-rw-r--r--src/mesa/drivers/dri/intel/intel_clear.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/mesa/drivers/dri/intel/intel_clear.c b/src/mesa/drivers/dri/intel/intel_clear.c
index 81c062fba53..76d33f9b37e 100644
--- a/src/mesa/drivers/dri/intel/intel_clear.c
+++ b/src/mesa/drivers/dri/intel/intel_clear.c
@@ -116,13 +116,13 @@ intelClear(struct gl_context *ctx, GLbitfield mask)
}
/* HW color buffers (front, back, aux, generic FBO, etc) */
- if (colorMask == ~0) {
+ if (intel->gen < 6 && colorMask == ~0) {
/* clear all R,G,B,A */
blit_mask |= (mask & BUFFER_BITS_COLOR);
}
else {
/* glColorMask in effect */
- tri_mask |= (mask & (BUFFER_BIT_FRONT_LEFT | BUFFER_BIT_BACK_LEFT));
+ tri_mask |= (mask & BUFFER_BITS_COLOR);
}
/* Make sure we have up to date buffers before we start looking at