diff options
| author | Samuel Pitoiset <[email protected]> | 2018-01-04 16:24:51 +0100 |
|---|---|---|
| committer | Samuel Pitoiset <[email protected]> | 2018-01-05 09:47:49 +0100 |
| commit | 85769759bf1f3297af36eb9aed67d9de418ca12a (patch) | |
| tree | c388d0a25dc0d1f3ab28452eeb94ada87c168f4a /src | |
| parent | 2719467eb66a559a8529ac29bb658d345c155031 (diff) | |
radv: limit the scissor bug workaround to Vega 10 and Raven
Signed-off-by: Samuel Pitoiset <[email protected]>
Reviewed-by: Bas Nieuwenhuizen <[email protected]>
Diffstat (limited to 'src')
| -rw-r--r-- | src/amd/vulkan/radv_cmd_buffer.c | 7 |
1 files changed, 6 insertions, 1 deletions
diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c index 0faf8030b49..b0bddd16b39 100644 --- a/src/amd/vulkan/radv_cmd_buffer.c +++ b/src/amd/vulkan/radv_cmd_buffer.c @@ -1118,7 +1118,12 @@ radv_emit_scissor(struct radv_cmd_buffer *cmd_buffer) { uint32_t count = cmd_buffer->state.dynamic.scissor.count; - if (cmd_buffer->device->physical_device->rad_info.chip_class >= GFX9) { + /* Vega10/Raven scissor bug workaround. This must be done before VPORT + * scissor registers are changed. There is also a more efficient but + * more involved alternative workaround. + */ + if (cmd_buffer->device->physical_device->rad_info.family == CHIP_VEGA10 || + cmd_buffer->device->physical_device->rad_info.family == CHIP_RAVEN) { cmd_buffer->state.flush_bits |= RADV_CMD_FLAG_PS_PARTIAL_FLUSH; si_emit_cache_flush(cmd_buffer); } |