diff options
| author | Dave Airlie <[email protected]> | 2017-06-06 08:47:22 +1000 |
|---|---|---|
| committer | Dave Airlie <[email protected]> | 2017-06-06 09:43:29 +1000 |
| commit | 77b8aa4d95678cf30210339d2afb75c7d1749f57 (patch) | |
| tree | 752947bba94b1a6a46939a30842a803799f34ee0 /src | |
| parent | 41eba750ba50156acb5ab0d56853e59ade55889a (diff) | |
radv: add gfx9 cp dma support.
This adds support to the CP dma code for GFX9, ported from
radeonsi.
Reviewed-by: Bas Nieuwenhuizen <[email protected]>
Signed-off-by: Dave Airlie <[email protected]>
Diffstat (limited to 'src')
| -rw-r--r-- | src/amd/vulkan/si_cmd_buffer.c | 21 |
1 files changed, 16 insertions, 5 deletions
diff --git a/src/amd/vulkan/si_cmd_buffer.c b/src/amd/vulkan/si_cmd_buffer.c index d111c988814..604a5e218ad 100644 --- a/src/amd/vulkan/si_cmd_buffer.c +++ b/src/amd/vulkan/si_cmd_buffer.c @@ -996,7 +996,9 @@ si_emit_cache_flush(struct radv_cmd_buffer *cmd_buffer) /* The max number of bytes that can be copied per packet. */ static inline unsigned cp_dma_max_byte_count(struct radv_cmd_buffer *cmd_buffer) { - unsigned max = S_414_BYTE_COUNT_GFX6(~0u); + unsigned max = cmd_buffer->device->physical_device->rad_info.chip_class >= GFX9 ? + S_414_BYTE_COUNT_GFX9(~0u) : + S_414_BYTE_COUNT_GFX6(~0u); /* make it aligned for optimal performance */ return max & ~(SI_CPDMA_ALIGNMENT - 1); @@ -1017,21 +1019,30 @@ static void si_emit_cp_dma(struct radv_cmd_buffer *cmd_buffer, assert(size <= cp_dma_max_byte_count(cmd_buffer)); radeon_check_space(cmd_buffer->device->ws, cmd_buffer->cs, 9); - - command |= S_414_BYTE_COUNT_GFX6(size); + if (cmd_buffer->device->physical_device->rad_info.chip_class >= GFX9) + command |= S_414_BYTE_COUNT_GFX9(size); + else + command |= S_414_BYTE_COUNT_GFX6(size); /* Sync flags. */ if (flags & CP_DMA_SYNC) header |= S_411_CP_SYNC(1); else { - command |= S_414_DISABLE_WR_CONFIRM_GFX6(1); + if (cmd_buffer->device->physical_device->rad_info.chip_class >= GFX9) + command |= S_414_DISABLE_WR_CONFIRM_GFX9(1); + else + command |= S_414_DISABLE_WR_CONFIRM_GFX6(1); } if (flags & CP_DMA_RAW_WAIT) command |= S_414_RAW_WAIT(1); /* Src and dst flags. */ - if (flags & CP_DMA_USE_L2) + if (cmd_buffer->device->physical_device->rad_info.chip_class >= GFX9 && + !(flags & CP_DMA_CLEAR) && + src_va == dst_va) + header |= S_411_DSL_SEL(V_411_NOWHERE); /* prefetch only */ + else if (flags & CP_DMA_USE_L2) header |= S_411_DSL_SEL(V_411_DST_ADDR_TC_L2); if (flags & CP_DMA_CLEAR) |